Exploiting processor workload heterogeneity for reducing energy consumption in chip multiprocessors

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 2, Issue , 2004, Pages 1158-1163

  Kadayif, I ^a   Kandemir, M ^b   Kolcu, I ^c  

^a ÇANAKKALE ONSEKIZ MART UNIVERSITY   (Turkey)

^b PENNSYLVANIA STATE UNIVERSITY   (United States)

^c UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED PROCESSORS; MULTI-VOLTAGE PROCESSORS; ON-CHIP MULTIPROCESSING; CHIP MULTIPROCESSING; DIFFERENT VOLTAGES; EMBEDDED APPLICATION; LOOP-LEVEL PARALLELISM; OPTIMIZATION STRATEGY; PARALLEL EXECUTIONS; REDUCING ENERGY CONSUMPTION; SEMICONDUCTOR TECHNOLOGY;

ELECTRIC FREQUENCY CONTROL; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; OPTIMIZATION; PROGRAM PROCESSORS; SOFTWARE ENGINEERING; TRANSISTORS; VERY LONG INSTRUCTION WORD ARCHITECTURE; VOLTAGE CONTROL; DESIGN; ENERGY UTILIZATION; EXHIBITIONS; PROGRAM COMPILERS; SEMICONDUCTOR DEVICE MANUFACTURE;

MULTIPROCESSING SYSTEMS; PARALLEL PROCESSING SYSTEMS;

EID: 3042662150     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269048     Document Type: Conference Paper

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