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Applied Physics Letters

Volumn 99, Issue 8, 2011, Pages

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

(2) Husermann, R a Batlogg, B a

a ETH ZURICH (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

GATE-BIAS STRESS; MATERIAL COMBINATION; PENTACENES; TRANSFER CHARACTERISTICS;

CHARGE TRAPPING; DIELECTRIC MATERIALS; SILICON COMPOUNDS; TRANSISTORS;

ORGANIC FIELD EFFECT TRANSISTORS;

EID: 80052413262 PISSN: 00036951 EISSN: None Source Type: Journal
DOI: 10.1063/1.3628297 Document Type: Article

Times cited : (77)

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