Wideband model of on-chip CMOS interconnects using space-mapping technique

International Journal of RF and Microwave Computer-Aided Engineering

Volumn 21, Issue 4, 2011, Pages 439-445

  Liu, Xiaochang ^a   Wang, Gaofeng ^b   Liu, Jia ^a  

^a SHENZHEN INSTITUTES OF ADVANCED TECHNOLOGY   (China)

^b WUHAN UNIVERSITY   (China)

Author keywords

artificial neural network; modeling; on chip CMOS interconnects; RFICs; space mapping

Indexed keywords

ARTIFICIAL NEURAL NETWORK; AVERAGE ERRORS; CIRCUIT COMPONENTS; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; DATA GENERATION; DIFFERENT STRUCTURE; ELECTROMAGNETIC SIMULATION; EM SIMULATIONS; ENHANCED LEARNING; GENERALIZATION ABILITY; GENERALIZATION CAPABILITY; ON CHIPS; PHYSICAL EFFECTS; RADIO FREQUENCIES; RFICS; S -PARAMETERS; SPACE MAPPING; SUB-BLOCKS; WIDE-BAND;

COMPUTER SIMULATION; MAPPING;

NEURAL NETWORKS;

EID: 79958829838     PISSN: 10964290     EISSN: 1099047X     Source Type: Journal    
DOI: 10.1002/mmce.20534     Document Type: Article

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