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Volumn 11, Issue 6, 2003, Pages 1143-1146

A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect

Author keywords

Delay; Extraction software; Static analysis; VLSI interconnect

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAPACITANCE; COMPUTER SOFTWARE; ELECTRIC NETWORK ANALYSIS; ELECTRIC RESISTANCE; EQUIVALENT CIRCUITS; FREQUENCIES; INDUCTANCE;

EID: 0742286405     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.817544     Document Type: Article
Times cited : (5)

References (14)
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  • 11
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    • Min/max on-chip inductance models and delay metrics
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.