Automatic inference of memory fences

Formal Methods in Computer Aided Design, FMCAD 2010

Volumn , Issue , 2010, Pages 111-119

  Kuperstein, Michael ^a   Vechev, Martin ^b   Yahav, Eran ^b  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^b IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC INFERENCE; COMPLEX TASK; CONCURRENT DATA STRUCTURES; CONCURRENT PROGRAM; ERROR PRONES; FINITE STATE PROGRAM; INPUT PROGRAMS; MEMORY MODELS; MEMORY OPERATIONS; MODERN ARCHITECTURES; NON-BLOCKING; NON-TRIVIAL ALGORITHMS; ORDERING CONSTRAINTS; RELAXED MEMORY MODELS; SAFETY SPECIFICATIONS;

ALGORITHMS; BEHAVIORAL RESEARCH; COMPUTER AIDED DESIGN; CONCURRENCY CONTROL; DATA STRUCTURES; FENCES; FORMAL METHODS; SPECIFICATIONS;

MEMORY ARCHITECTURE;

EID: 79958703851     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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