On the verification problem for weak memory models

ACM SIGPLAN Notices

Volumn 45, Issue 1, 2010, Pages 7-18

  Atig, Mohamed Faouzi ^a   Bouajjani, Ahmed ^a   Burckhardt, Sebastian ^b   Musuvathi, Madanlal ^b  

^a UNIVERSITÉ PARIS DIDEROT   (France)

^b MICROSOFT RESEARCH   (United States)

Author keywords

Infinite state systems; Lossy channel systems; Program verification; Relaxed memory models

Indexed keywords

COMPUTABILITY AND DECIDABILITY; PROGRAM PROCESSORS;

HARDWARE ARCHITECTURE; INFINITE STATE SYSTEMS; LOCK-FREE SYNCHRONIZATION; LOSSY CHANNEL SYSTEMS; MULTI PROCESSOR ARCHITECTURE; PROGRAM VERIFICATION; RELAXED MEMORY MODELS; VERIFICATION PROBLEMS;

MEMORY ARCHITECTURE;

EID: 77149166034     PISSN: 15232867     EISSN: None     Source Type: Journal    
DOI: 10.1145/1707801.1706303     Document Type: Conference Paper

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