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IEEE Transactions on Computers

Volumn 50, Issue 8, 2001, Pages 824-833

Hiding relaxed memory consistency with a compiler

(2) Lee, Jaejin a,b Padua, David A a,c

a IEEE (United States)

b Michigan State University (United States)

c University of Illinois at Urbana Champaign (United States)

Author keywords

Compiler; Dominator; Fence; NP hard; Relaxed memory consistency; Sequential consistency; Synchronization

Indexed keywords

CONTROL FLOW GRAPH; PARALLEL PROGRAMS; RELAXED MEMORY CONSISTENCY; SEQUENTIAL CONSISTENCY;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER PROGRAMMING; CONSTRAINT THEORY; DATA STORAGE EQUIPMENT; GRAPH THEORY; MATHEMATICAL MODELS; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; SYNCHRONIZATION;

PROGRAM COMPILERS;

EID: 0035416088 PISSN: 00189340 EISSN: None Source Type: Journal
DOI: 10.1109/12.947002 Document Type: Article

Times cited : (42)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.