A 45.6μ2 13.4μw 7.1v/v resolution sub-threshold based digital process-sensing circuit in 45nm CMOS

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2011, Pages 133-138

  Datta, Basab ^a   Burleson, Wayne ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

Process variation; Sensor; Sub threshold operation

Indexed keywords

ACCURACY LOSS; CIRCUIT PERFORMANCE; COMPENSATION SCHEME; DEEP SUB-MICRON TECHNOLOGY; HIGH-SENSITIVITY; INDUCED NOISE; LOW-POWER DISSIPATION; MONITORING CIRCUIT; ON-CHIP PROCESS; PARAMETER VARIATION; PHYSICAL SENSORS; PROCESS OPTIMIZATION; PROCESS-VARIATION; SUBTHRESHOLD; SUBTHRESHOLD OPERATION; TEMPERATURE VARIATION; YIELD ENHANCEMENT;

LAKES; OPTIMIZATION; PROCESS CONTROL; PROCESS MONITORING; SENSITIVITY ANALYSIS; SENSORS;

VLSI CIRCUITS;

EID: 79957712619     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1973009.1973037     Document Type: Conference Paper

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