On-chip process variation detection using slew-rate monitoring circuit

Proceedings of the IEEE International Frequency Control Symposium and Exposition

Volumn , Issue , 2008, Pages 143-147

  Ghosh, Amlan ^a   Rao, Rahul M ^b   Kim, Jae Joon ^b   Chuang, Ching Te ^b   Brown, Richard B ^a  

^a UNIVERSITY OF UTAH   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL PATHS; DESIGN CONSIDERATIONS; DETECTION SCHEMES; DETECTION TECHNIQUES; INTERNATIONAL CONFERENCES; METRICS (CO); MONITOR (CO); ON CHIPS; PARAMETRIC YIELD; PMOS DEVICES; PROCESS VARIATIONS; SIMULATION RESULTS; SLEW RATE (SR); SOI TECHNOLOGY; THRESHOLD VOLTAGE VARIATIONS; VLSI DESIGNS;

INTEGRATED CIRCUITS; NETWORKS (CIRCUITS);

PROCESS ENGINEERING;

EID: 47649118726     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.2008.67     Document Type: Conference Paper

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