Oxide-tunneling leakage suppressed SRAM for Sub-65-nm very large scale integrated circuits

Journal of Low Power Electronics

Volumn 7, Issue 1, 2011, Pages 87-95

  Bong, Ji Hye ^a   Jo, Kwan Hee ^a   Min, Kyeong Sik ^a   Kang, Sung Mo ^b  

^a Kookmin University   (South Korea)

^b University of California   (United States)

Author keywords

Low Power SRAM; Low swing wordline; Low swing write; Oxide tunneling leakage; Subthreshold leakage

Indexed keywords

PREDICTIVE ANALYTICS; STATIC RANDOM ACCESS STORAGE; TIMING CIRCUITS;

LOW SWING; LOW-POWER SRAM; SUB-THRESHOLD LEAKAGE; TUNNELING LEAKAGE; WORDLINES;

VLSI CIRCUITS;

EID: 79955364971     PISSN: 15461998     EISSN: 15462005     Source Type: Journal    
DOI: 10.1166/jolpe.2011.1119     Document Type: Article

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