A self-alignment row-by-row variable-VDD scheme reducing 90 of active-leakage power in SRAM's

IEICE Transactions on Electronics

Volumn E90-C, Issue 4, 2007, Pages 743-748

  Saliba, Fayez Robert ^a,c   Kawaguchi, Hiroshi ^b,d   Sakurai, Takayasu ^a  

^a UNIVERSITY OF TOKYO   (Japan)

^b INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

^c Takumi Technology

^d KOBE UNIVERSITY   (Japan)

Author keywords

Active leakage; Low power; SRAM

Indexed keywords

ELECTRIC GENERATORS; RANDOM ACCESS STORAGE; VOLTAGE CONTROL;

ACTIVE LEAKAGE; TIMING GENERATORS;

LEAKAGE CURRENTS;

EID: 34247118385     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e90-c.4.743     Document Type: Article

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