A 90 nm Low Power 32k-Byte Embedded SRAM with Gate Leakage Suppression Circuit for Mobile Applications

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2003, Pages 247-250

  Nii, Koji ^a   Tenoh, Yoshihiro ^a   Yoshizawa, Tomoaki ^a   Imaoka, Susumu ^a   Tsukamoto, Yasumasa ^a   Yamagami, Yoshinobu ^b   Suzuki, Toshikazu ^b   Shibayama, Akinori ^b   Makino, Hiroshi ^a   Iwade, Shuhei ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LEAKAGE CURRENTS; MOBILE TELECOMMUNICATION SYSTEMS; MOSFET DEVICES;

GATE LEAKAGE SUPPRESSION;

STATIC RANDOM ACCESS STORAGE;

EID: 0141649394     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. International Technology Roadmap for Semiconductors, 2001 Update
2. K. Tomita et al., VLSITech. Dig. pp14-15, 2002.
3. Bharadwaj S. et al., IEEE JSSC, VOL.33, No.8, Aug. 1998.
4. Kenichi Osada, et al., ISSCC Tech. Dig. pp168-169, 2001