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Volumn 32, Issue 4, 2011, Pages 467-469

Mechanism of stress memorization technique (SMT) and method to maximize its effect

Author keywords

Laser annealing (LSA); stress; stress memorization technique (SMT); TCAD

Indexed keywords

EXPERIMENTAL DATA; FUNDAMENTAL THEORY; GATE OXIDE; LASER ANNEALING; PREDICTIVE CAPABILITIES; SMT PROCESS; STRESS MEMORIZATION TECHNIQUE (SMT); STRESS MEMORIZATION TECHNIQUES; TCAD; THERMAL ANNEALS; THERMAL PROPERTIES;

EID: 79953041150     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2011.2108634     Document Type: Article
Times cited : (12)

References (11)
  • 8
    • 4243728949 scopus 로고    scopus 로고
    • Thermal expansion and grüneisen parameters of amorphous silicon: A realistic model calculation
    • J. Fabian and P. B. Allen, "Grüneisen parameters and thermal expansion of amorphous silicon," Phys. Rev Lett., vol. 79, no. 10, pp. 1885-1888, Sep. 1997. (Pubitemid 127644805)
    • (1997) Physical Review Letters , vol.79 , Issue.10 , pp. 1885-1888
    • Fabian, J.1    Allen, P.B.2
  • 9
    • 68349137943 scopus 로고    scopus 로고
    • Stress memorization technique-Fundamental understanding and low-cost integration for advanced CMOS technology using a nonselective process
    • Aug.
    • C. Ortolland, Y. Okuno, P. Verheyen, C. Kerner, C. Staplemann, M. Aoulaiche, N. Horiguchi, and T. Hoffmann, "Stress memorization technique-Fundamental understanding and low-cost integration for advanced CMOS technology using a nonselective process," IEEE Trans. Electron Devices, vol. 56, no. 8, pp. 1690-1697, Aug. 2009.
    • (2009) IEEE Trans. Electron Devices , vol.56 , Issue.8 , pp. 1690-1697
    • Ortolland, C.1    Okuno, Y.2    Verheyen, P.3    Kerner, C.4    Staplemann, C.5    Aoulaiche, M.6    Horiguchi, N.7    Hoffmann, T.8
  • 10
    • 64549146610 scopus 로고    scopus 로고
    • Physical and electrical analysis of stress memorization technique (SMT) using poly-gates and its optimization for beyond 45 nm high performance applications
    • T. Miyashita, T. Owada, A. Hatada, Y. Hayami, K. Ookoshi, T. Mori, H. Kurata, and T. Futatsugi, "Physical and electrical analysis of stress memorization technique (SMT) using poly-gates and its optimization for beyond 45 nm high performance applications," in IEDM Tech. Dig., 2008, pp. 55-58.
    • (2008) IEDM Tech. Dig. , pp. 55-58
    • Miyashita, T.1    Owada, T.2    Hatada, A.3    Hayami, Y.4    Ookoshi, K.5    Mori, T.6    Kurata, H.7    Futatsugi, T.8


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.