An 18 b 12.5 MS/s ADC with 93 dB SNR

IEEE Journal of Solid-State Circuits

Volumn 45, Issue 12, 2010, Pages 2647-2654

  Hurrell, Christopher Peter ^a   Lyden, Colin ^a   Laing, David ^b   Hummerston, Derek ^a   Vickery, Mark ^a  

^a Analog Devices Inc UK   (United Kingdom)

^b ANALOG DEVICES   (Ireland)

Author keywords

ADC; calibration; dither; flash; pipeline; successive approximation

Indexed keywords

ADC; CAPACITOR MISMATCH ERRORS; CMOS PROCESSS; DC ACCURACY; DIGITAL X-RAY IMAGING SYSTEMS; DITHER; DYNAMIC RANGE; ERROR COEFFICIENT; FLASH; FLASH-ADC; MULTI-BITS; NON-VOLATILE MEMORIES; OUTPUT DATA; POWER CONSUMPTION; SUCCESSIVE APPROXIMATIONS; SUCCESSIVE-APPROXIMATION ADC;

CALIBRATION; CAPACITORS; CMOS INTEGRATED CIRCUITS; DC POWER TRANSMISSION; ERRORS; PIPELINES;

APPROXIMATION THEORY;

EID: 78650049756     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2075310     Document Type: Conference Paper

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