A mostly digital variable-rate continuous-time ADC ΔΣ modulator

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 298-299

  Taylor, Gerry ^a,b   Galton, Ian ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTINUOUS TIME; DIGITAL CIRCUITRY; IC PROCESS; REFERENCE VOLTAGES; RING OSCILLATOR; VARIABLE RATE;

JITTER; MODULATION; OSCILLATORS (ELECTRONIC);

MODULATORS;

EID: 77952170786     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433930     Document Type: Conference Paper

References (4)

1. M. Høvin, A. Olsen, T. S. Lande, C. Toumazou, "Delta-Sigma Modulators Using Frequency-Modulated Intermediate Values," IEEE Journal of Solid-State Circuits, vol. 32, no. 1, pp. 13-22, Jan. 1997.
2. M. Z. Straayer, M. H. Perrott, "A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΔΣ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer," IEEE Journal of Solid-State Circuits, vol. 43, no. 4, April 2008.
3. A. Panigada, I. Galton, "A 130MS/s Pipelined ADC with 69dB SNDR Enabled by Digital Harmonic Distortion Correction," IEEE International Solid-State Circuits Conference, February 2009.
4. G. Mitteregger, C. Ebner, S. Mechnig, T. Blon, C. Holugigue, E. Romani, "A 20-mW 640-MHz CMOS Continuous-Time ΔΣ ADC With 20-MHz Signal Bandwidth, 80-dB Dynamic Range and 12-bit ENOB," IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2641-2649, December 2006.