A 100mW 10MHz-BW CT ΔΣ modulator with 87dB DR and 91dBc IMD

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 497-499

  Yang, Wenhua ^a   Schofield, William ^a   Shibata, Hajime ^a   Korrapati, Sudhir ^a   Shaikh, Ali ^a   Abaskharoun, Nazmy ^a   Ribner, Dave ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORKS (CIRCUITS); SOLID STATE DEVICES;

CMOS PROCESSS; DELTA SIGMA MODULATOR; FEED-FORWARD TOPOLOGY; HYBRID FEEDBACK;

MODULATORS;

EID: 49549112502     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523275     Document Type: Conference Paper

References (4)

1. L. J. Breems, R. Rutten, R. van Veldhoven, et al., "A 56mW CT Quadrature Cascaded ΔΣ Modulator with 77dB DR in a Near Zero-IF 20MHz Band," ISSCC Dig. Tech. Papers, pp. 238-239, Feb. 2007.
2. G. Mitteregger, C. Ebner, S. Mechnig, et al., "A 14b 20mW 640MHz CMOS CT ΔΣ ADC with 20MHz Signal Bandwidth and 12b ENOB," ISSCC Dig. Tech. Papers, pp. 62-63, Feb. 2006.
3. R. T. Baird and T. S. Fiez, "Linearity Enhancement of Multibit ΔΣ A/D and D/A Converters using Data Weighted Averaging," IEEE Trans. Circuits Syst. II, vol. 42, no. 12, pp. 753-762, Dec. 1995.
4. Y. Geerts, M. S. J. Steyaert and W. Sansen, "A High-Performance Multibit ΔΣ CMOS ADC," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1829-1840, Dec. 2000.