-
1
-
-
46049112056
-
A cost-effective low power platform for the 45-nm technology node
-
E. Josse et al., "A cost-effective low power platform for the 45-nm technology node, " IEDM Tech. Dig., pp. 693-696, 2006.
-
(2006)
IEDM Tech. Dig.
, pp. 693-696
-
-
Josse, E.1
-
2
-
-
51949090717
-
A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment
-
K. Nii et al., "A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment, " Symp. VLSI Circuit Dig., pp. 212-213, 2008.
-
(2008)
Symp. VLSI Circuit Dig.
, pp. 212-213
-
-
Nii, K.1
-
3
-
-
43549116825
-
Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap
-
X. Sun et al., "Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap, " IEEE Electron Device Letters, Vol. 29, No. 5, pp. 491-493, 2008.
-
(2008)
IEEE Electron Device Letters
, vol.29
, Issue.5
, pp. 491-493
-
-
Sun, X.1
-
4
-
-
33745118673
-
Vertex channel array transistor (VCAT) featuring sub- 60nm high performance and highly manufacturable trench capacitor DRAM
-
M. Kito et al., "Vertex channel array transistor (VCAT) featuring sub- 60nm high performance and highly manufacturable trench capacitor DRAM, " Symp. VLSI Tech. Dig., pp. 32-33, 2005.
-
(2005)
Symp. VLSI Tech. Dig.
, pp. 32-33
-
-
Kito, M.1
-
5
-
-
78649920227
-
-
U.S. Patent 7, 190, 050
-
U.S. Patent 7, 190, 050.
-
-
-
-
6
-
-
64549129929
-
Scaling of 32nm low power SRAM with high-K metal gate
-
H.S. Yang et al., "Scaling of 32nm low power SRAM with high-K metal gate, " IEDM Tech. Dig., pp. 233-236, 2008.
-
(2008)
IEDM Tech. Dig.
, pp. 233-236
-
-
Yang, H.S.1
-
7
-
-
64549128608
-
Demonstration of highly scaled FinFET SRAM cells with high-K/metal gate and investigation of characteristic variability for the 32nm node and beyond
-
H. Kawasaki et al., "Demonstration of highly scaled FinFET SRAM cells with high-K/metal gate and investigation of characteristic variability for the 32nm node and beyond, " IEDM Tech. Dig., pp. 237- 240, 2008.
-
(2008)
IEDM Tech. Dig.
, pp. 237-240
-
-
Kawasaki, H.1
-
9
-
-
64549118580
-
32nm gate-first high-k/metal-gate technology for high performance low power applications
-
C.H. Diaz et al., "32nm gate-first high-k/metal-gate technology for high performance low power applications, " IEDM Tech. Dig., pp. 629- 632, 2008.
-
(2008)
IEDM Tech. Dig.
, pp. 629-632
-
-
Diaz, C.H.1
-
10
-
-
64649085166
-
32nm general purpose bulk CMOS technology for high performance applications at low voltage
-
F. Arnaud et al., "32nm general purpose bulk CMOS technology for high performance applications at low voltage, " IEDM Tech. Dig., pp. 633-636, 2008.
-
(2008)
IEDM Tech. Dig.
, pp. 633-636
-
-
Arnaud, F.1
-
12
-
-
77952746075
-
Performance and area scaling benefits of FD-SOI technology for 6-T SRAM cells at the 22nm node
-
C. Shin, et al., "Performance and area scaling benefits of FD-SOI technology for 6-T SRAM cells at the 22nm node, " IEEE Trans. Electron Devices, Vol. 57, No. 6, pp. 1301-1309, 2010.
-
(2010)
IEEE Trans. Electron Devices
, vol.57
, Issue.6
, pp. 1301-1309
-
-
Shin, C.1
-
13
-
-
78650760269
-
Modeling and analysis of grain-orientation effects in emerging metal-gate devices and implications for SRAM reliability
-
H. Dadgour, K. Endo, V. De, and K. Banerjee, "Modeling and analysis of grain-orientation effects in emerging metal-gate devices and implications for SRAM reliability, " IEDM Tech. Dig., pp. 705-708, 2008.
-
(2008)
IEDM Tech. Dig.
, pp. 705-708
-
-
Dadgour, H.1
Endo, K.2
De, V.3
Banerjee, K.4
-
14
-
-
67650149810
-
Study of random-dopantfluctuation (RDF) effects for the tri-gate bulk MOSFET
-
C. Shin, X. Sun, and T.-J. King Liu, "Study of random- dopantfluctuation (RDF) effects for the tri-gate bulk MOSFET, " IEEE Trans. Electron Devices, Vol. 56, No. 7, pp. 1538-1542, 2009.
-
(2009)
IEEE Trans. Electron Devices
, vol.56
, Issue.7
, pp. 1538-1542
-
-
Shin, C.1
Sun, X.2
King Liu, T.-J.3
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