Study of random-dopant-fluctuation (RDF) effects for the trigate bulk MOSFET

IEEE Transactions on Electron Devices

Volumn 56, Issue 7, 2009, Pages 1538-1542

  Shin, Changhwan ^a   Sun, Xin ^a   Liu, Tsu Jae King ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Multigate FET; Random dopant fluctuations (RDFs); Variability

Indexed keywords

3D DEVICE SIMULATION; BODY DOPING; BULK MOSFET; DOPING PROFILES; GATE LENGTH; MULTIGATE FET; RANDOM-DOPANT FLUCTUATIONS (RDFS); SHORT-CHANNEL EFFECT; TRIGATE; VARIABILITY;

DOPING (ADDITIVES); ELECTRIC POTENTIAL; FIELD EFFECT TRANSISTORS; MESFET DEVICES;

MOSFET DEVICES;

EID: 67650149810     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2020321     Document Type: Article

References (15)

1. K. Takeuchi, T. Fukai, T. Tsunomura, A. T. Putra, A. Nishida, S. Kamohara, and T. Hiramoto, "Understanding random threshold voltage fluctuation by comparing multiple fabs and technologies," in IEDM Tech. Dig., Dec. 2007, pp. 467-470.
2. A. Asenov, "Simulation of statistical variability in nano MOSFETs," in IEEE Syrup. VLSI Technol., Dig. Tech. Papers, Jun. 2007, pp. 86-87.
3. A. Asenov and S. Saini, "Suppression of random dopant-induced threshold voltage fluctuations in sub-0.1-μm MOSFETs with epitaxial and δ-doped channels," IEEE Trans. Electron Devices, vol. 46, no. 8, pp. 1718-1724, Aug. 1999.
4. T. Ohtou, N. Sugii, and T. Hiramoto, "Impact of parameter variations and random dopant fluctuations on short-channel fully depleted SOI MOSFETs with extremely thin BOX," IEEE Electron Device Lett., vol. 28, no. 8, pp. 740-742, Aug. 2007.
5. K. Takeuchi, R. Koh, and T. Mogami, "A study of the threshold voltage variation for ultra-small bulk and SOI CMOS," IEEE Trans. Electron Devices, vol. 48, no. 9, pp. 1995-2001, Sep. 2001.
6. K. J. Kuhn, "Reducing variation in advanced logic technologies: Approaches to process and design for manufacturability of nanoscale CMOS," in IEDM Tech. Dig., Dec. 2007, pp. 471-474.
7. Y. Li and S.-M. Yu, "Comparison of random-dopant-induced thresh-old voltage fluctuation in nanoscale single-, double-, and surrounding-gate field-effect transistors," Jpn. J. Appl. Phys., vol. 45, no. 9A, pp. 6860-6865, Sep. 2006.
8. A. R. Brown, A. Asenov, and J. R. Watling, "Intrinsic fluctuations in sub 10-nm double-gate MOSFETs introduced by discreteness of charge and matter," IEEE Trans. Electron Devices, vol. 1, no. 4, pp. 195-200, Dec. 2002.
9. V. Varadarajan, L. Smith, S. Balasubramanian, and T.-J. King Liu, "Multi-gate FET design for tolerance to statistical dopant fluctuations," in Proc. Silicon Nanoelectronics Workshop, Jun. 2006, pp. 137-138.
10. Sentaurus User's Manual, Synopsys, Inc., Mountain View, CA. v. 2006.12.
11. X. Sun, Q. Liu, V. Moroz, H. Takeuchi, G. Gebara, J. Wetzel, S. Ikeda, C. Shin, and T.-J. King Liu, "Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap," IEEE Electron Device Lett., vol. 29, no. 5, pp. 491-493, May 2008.
12. N. Sano, K. Matsuzawa, M. Mukai, and N. Nakayama, "Role of long-range and short-range Coulomb potentials in threshold characteristics under discrete dopants in sub-0.1 um Si-MOSFETs," in IEDM Tech. Dig., Dec. 2000, pp. 275-278.
13. T. Ezaki, T. Ikezawa, A. Notsu, K. Tanaka, and M. Hane, "3D MOSFET simulation considering long-range Coulomb potential effects for analyzing statistical dopant-induced fluctuations associated with atomistic process simulator," in Proc. SISPAD, Sep. 2002, pp. 87-90.
14. C. Shin, A. Carlson, X. Sun, K. Jeon, and T.-J. King Liu, "Tri-gate bulk MOSFET design for improved robustness to random dopant fluctuations," in IEEE Silicon Nanoelectronics Workshop, Jun. 2008, pp. S1150.
15. T. Mizuno, J.-I. Okamura, and A. Toriumi, "Experimental study of thresh-old voltage fluctuation due to statistical variation of channel dopant number in MOSFETs," IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2216-2221, Nov. 1994.