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Volumn , Issue , 2008, Pages 200-203

Reliable NoC architecture utilizing a robust rerouting algorithm

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION OVERHEADS; FAULTY LINKS; NOC ARCHITECTURES; NOC SWITCH; OFFLINE TEST; RECONFIGURABILITY; REROUTING ALGORITHMS; ROUTING PACKETS; SELF-RECONFIGURABLE; SYSTEM LEVELS; SYSTEM ON CHIP DESIGN;

EID: 78049514751     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EWDTS.2008.5580142     Document Type: Conference Paper
Times cited : (5)

References (19)
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  • 5
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    • Grecu, C.1    Pande, P.2    Ivanov, A.3    Saleh, R.4
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    • 28444461050 scopus 로고    scopus 로고
    • Methodologies and algorithm for testing switch-based NoC interconnects
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    • A heuristic search algorithm for re-routing of on-chip networks in the presence of faulty links and switches
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    • A dynamic routing mechanism for network on chip
    • M. Ali, M. Welzl, and S. Hellebrand, "A Dynamic Routing Mechanism for Network on chip," Proc. NORCHIP Conf., 2005, pp. 70-73.
    • (2005) Proc. NORCHIP Conf. , pp. 70-73
    • Ali, M.1    Welzl, M.2    Hellebrand, S.3
  • 15
    • 34047183206 scopus 로고    scopus 로고
    • Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
    • T. Wild, A. Herkersdorf, and R. Ohlendorf, "Performance Evaluation for System-on-Chip Architectures using Trace-based Transaction Level Simulation," Proc. DATE, 2006, pp. 1-6.
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  • 17
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.