Scan based speed-path debug for a microprocessor

2010 15th IEEE European Test Symposium, ETS'10

Volumn , Issue , 2010, Pages 207-212

  Zeng, Jing ^a   Guo, Ruifeng ^b   Cheng, Wu Tung ^b   Maleja, Michael ^a   Wang, Jing ^a   Tsai, Kun Han ^b   Amstutz, Ken ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AT-SPEED; CLOCK FREQUENCY; CRITICAL STEPS; DEBUG TECHNIQUES; DIAGNOSIS ALGORITHMS; FUNCTIONAL PATTERN; HIGH-PERFORMANCE MICROPROCESSORS; IMPROVED ALGORITHM; LEADING EDGE; PERFORMANCE REQUIREMENTS; SCAN TESTS;

MICROPROCESSOR CHIPS;

EID: 78049282424     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ETSYM.2010.5512756     Document Type: Conference Paper

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