Analysis of soft error rates in combinational and sequential logic and implications of hardening for advanced technologies

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 1031-1035

  Mahatme, N N ^a   Chatterjee, I ^a   Bhuva, B L ^a   Ahlbin, J ^a   Massengill, L W ^a   Shuler, R ^b  

^a VANDERBILT UNIVERSITY   (United States)

^b NASA JOHNSON SPACE CENTER   (United States)

Author keywords

Single event effects; Single event transient; Single event upset; Soft error rates; Transient propagation; Transient pulse width

Indexed keywords

SINGLE EVENT EFFECTS; SINGLE EVENT TRANSIENTS; SINGLE EVENT UPSET; SOFT ERROR RATE; TRANSIENT PROPAGATION; TRANSIENT PULSE-WIDTH;

ERROR CORRECTION; HARDENING; TRANSIENTS;

MICROPROCESSOR CHIPS;

EID: 77957893318     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488680     Document Type: Conference Paper

References (14)

1. Heijmen T. et al., "A Comprehensive Study on the Soft-Error Rate of Flip-Flops From 90-nm Production Libraries" IEEE Transactions On Device And Materials Reliability, vol. 7, No. 1, pp 84-96, 2007.
2. Buchner S. et al., "Comparison of Error Rates in Combinational and Sequential Logic", IEEE Transactions On Nuclear Science, vol. 44, No. 6, pp 2209-2216, 1997.
3. Shivakumar P. et al., "Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic", Proceedings of the International Conference on Dependable Systems and Networks, pp 389-398, 2002.
4. Baumann R, "Radiation Induced Soft Errors in Advanced Semiconductor Technologies", IEEE Transactions on Device Materials and Reliability, Vol 5, No3, pp 305-316, 2005
5. Gill B. et al., "Gill. B. et al., "Comparison of Alpha-particle and Neutron-induced Combinational and Sequential Logic Error Rates at the 32nm Technology Node" Proceedings of 47th Annual International Reliability Physics Symposium, pp 199-205, 2009.
6. Narasimham B. "Characterization Of Heavy-Ion, Neutron And Alpha Particle Induced Single-Event Transient Pulse Widths In Advanced CMOS Technologies", PhD Thesis, Vanderbilt University, 2008
7. Agostinelli S. et al., "GEANT-4 a simulation Toolkit," Nucl. Instrum. Meth. Phys Res. Vol A, 506, pp 250-306, 2003
8. nd Midwest Symposium on Circuits and Systems, vol 1, pp 12-125, 1999.
9. Karnik T. et al., "Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes", IEEE Transactions on Dependable and Secure Computing, Vol. 1, pp 128-143, April-June 2004
10. Gadlage M. J. et al., "Digital Device Error Rate Trends in Advanced CMOS Technologies", IEEE Transactions On Nuclear Science, Vol. 53, No. 6, pp3462-3464, 2006
11. Ahlbin J. et al., "C-CREST Technique for Combinational Logic SET Testing" IEEE Transactions on Nuclear Science, Vol. 55, No. 6, pp 3347-33512008.
12. Seifert N. et al., "Frequency dependence of Errors for Deep Sub-Micron CMOS Technologies", IEDM technical digest, pp14.4.1-14.4.4, 2001
13. Seifert N. et al., "Radiation Induced Soft Error Rates of Advanced CMOS Bulk Devices", Proc of International Reliability Physics Symposium, pp 217-225, 2006.
14. Calin T. et al., "Upset hardened memory design for submicron CMOS technology," IEEE Transactions on Nuclear Science, vol. 43, no. 6, pp. 2874-2878, 1996.