Modelling and optimization of III/V transistors with matrices of nanowires

Solid-State Electronics

Volumn 54, Issue 12, 2010, Pages 1505-1510

  Larsen, Christian ^a   Ärlelid, Mats ^a   Lind, Erik ^a   Wernersson, Lars Erik ^a  

^a LUND UNIVERSITY   (Sweden)

Author keywords

Field Effect Transistor; InAs; Nanowire; Ring oscillator; Wrap gate

Indexed keywords

ANALYTICAL MODEL; DIFFERENT STRUCTURE; INAS; IV CHARACTERISTICS; MATRIX; NANOWIRE TRANSISTORS; PARASITIC CAPACITANCE; PARASITIC COMPONENTS; PARASITICS; RING-OSCILLATOR; S -PARAMETERS; TRANSISTOR MODEL; TRANSISTOR PERFORMANCE; TRANSISTOR STRUCTURE; WRAP-GATE;

FIELD EFFECT TRANSISTORS; MATHEMATICAL MODELS; OPTIMIZATION; OSCILLATORS (ELECTRONIC); SCATTERING PARAMETERS; SEMICONDUCTING INDIUM;

NANOWIRES;

EID: 77957317458     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2010.06.017     Document Type: Article

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