Efficient hybrid CMOS-Nano circuit design for spiking neurons and memristive synapses with STDP

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E93-A, Issue 9, 2010, Pages 1670-1677

  Afifi, Ahmad ^a   Ayatollahi, Ahmad ^a   Raissi, Farshid ^b   Hajghassem, Hasan ^c  

^a IRAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Iran)

^b K N TOOSI UNIVERSITY OF TECHNOLOGY   (Iran)

^c Beheshti University   (Iran)

Author keywords

CMOS Nano hybrid; Memristor; Spiking neural network; STDP

Indexed keywords

CHARACTER RECOGNITION; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT MANUFACTURE; NEURONS; TIMING CIRCUITS;

EFFICIENT IMPLEMENTATION; INTEGRATE-AND-FIRE NEURONS; MEMRISTOR; NANO HYBRIDS; SPIKE TIMING DEPENDENT PLASTICITIES; SPIKING NEURAL NETWORKS; STDP; TEMPORAL INFORMATION;

NEURAL NETWORKS;

EID: 77956467355     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1587/transfun.E93.A.1670     Document Type: Article

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