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Volumn 132, Issue 2, 2010, Pages 0210081-0210088

Multi-objective optimization to improve both thermal and device performance of a nonuniformly powered micro-architecture

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CLOCKS; DELAY CIRCUITS; INTEGRATED CIRCUIT DESIGN; MEMORY ARCHITECTURE; MULTIOBJECTIVE OPTIMIZATION;

EID: 77955539303     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.4001852     Document Type: Article
Times cited : (13)

References (23)
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    • Design challenges of technology scaling
    • Borkar, S., 1999, "Design Challenges of Technology Scaling", IEEE MICRO, 19 (4), pp. 23-29.
    • (1999) IEEE MICRO , vol.19 , Issue.4 , pp. 23-29
    • Borkar, S.1
  • 3
    • 85199284067 scopus 로고    scopus 로고
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    • 2005, International Technology Roadmap for Semiconductors.
    • (2005)
  • 4
    • 33947269110 scopus 로고    scopus 로고
    • Cooling a microprocessor chip
    • Mahajan, R., Chiu, C.-P., and Chrysler, G., 2006, "Cooling a Microprocessor Chip", Proc. IEEE, 94 (8), pp. 1476-1486.
    • (2006) Proc. IEEE , vol.94 , Issue.8 , pp. 1476-1486
    • Mahajan, R.1    Chiu, C.-P.2    Chrysler, G.3
  • 6
    • 85199284289 scopus 로고    scopus 로고
    • Thermal methodology for evaluating the performance of microelectronic devices with non-uniform power dissipation
    • San Diego, CA
    • Goh, T., Seetharamu, K., Quadir, G., and Zainal, Z., 2002, "Thermal Methodology for Evaluating the Performance of Microelectronic Devices With Non-Uniform Power Dissipation", 52nd Electronic Components and Technology Conference, San Diego, CA, pp. 1181-1186.
    • (2002) 52nd Electronic Components and Technology Conference , pp. 1181-1186
    • Goh, T.1    Seetharamu, K.2    Quadir, G.3    Zainal, Z.4
  • 15
    • 85199254738 scopus 로고    scopus 로고
    • Source: Dr. Kanad Ghose, SUNY Binghamton
    • Source: Dr. Kanad Ghose, SUNY Binghamton.
  • 16
    • 77955535280 scopus 로고    scopus 로고
    • Mptlsim: A cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches
    • Zeng, H., Yourst, M., Ghose, K., and Ponomarev, D., 2009, "MPTLsim: A Cycle-Accurate, Full-System Simulator for x86-64 Multicore Architectures With Coherent Caches", ACM SIGARCH Computer Architecture News, 37 (2), pp. 1-9.
    • (2009) ACM SIGARCH Computer Architecture News , vol.37 , Issue.2 , pp. 1-9
    • Zeng, H.1    Yourst, M.2    Ghose, K.3    Ponomarev, D.4
  • 17
    • 77955528787 scopus 로고    scopus 로고
    • www.cnet.news.com
    • 2005, "Moore's Law Turns 40", http://i.i.com.com/cnwk.1d/i/ne/ p/photo/pentium4-500x568.jpg, www.cnet.news.com
    • (2005) Moore's Law Turns 40
  • 21
    • 85199305915 scopus 로고    scopus 로고
    • ansys icepak, Ver. 4.4.8
    • ansys icepak, Ver. 4.4.8.
  • 22
    • 85199275601 scopus 로고    scopus 로고
    • Source: Intel Pentium 4 Processors for Embedded Computing Specifications
    • Source: Intel Pentium 4 Processors for Embedded Computing Specifications.
  • 23
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    • Thermal frontiers in the design and packaging of microelectronic equipment
    • Bar-Cohen, A., Kraus, A., and Davidson, S., 1983, "Thermal Frontiers in the Design and Packaging of Microelectronic Equipment", Mech. Eng. (Am. Soc. Mech. Eng.), 105 (6), pp. 53-59.
    • (1983) Mech. Eng. (Am. Soc. Mech. Eng.) , vol.105 , Issue.6 , pp. 53-59
    • Bar-Cohen, A.1    Kraus, A.2    Davidson, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.