Fast placement-dependent full chip thermal simulation

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 2001, Pages 249-252

  Yu, Zhiping ^a,b   Yergeau, Daniel ^a   Dutton, Robert W ^a   Nakagawa, Sam ^c   Deeney, Jeff ^c,d   Chang, Norman ^e   Lin, Shen ^e   Xie, Weize ^e  

^a Stanford University   (United States)

^b HP ^*  (United States)

^c HEWLETT PACKARD LABORATORIES   (United States)

^d HP   (United States)

^e Apache Design Solutions Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANISOTROPY; BOUNDARY CONDITIONS; CHIP SCALE PACKAGES; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POWER GENERATION; SEMICONDUCTING SILICON; SPECIFIC HEAT; TEMPERATURE DISTRIBUTION; THERMAL CONDUCTIVITY; THERMAL DIFFUSION; THERMAL EFFECTS;

ELECTRIC POWER CONSUMPTION;

MICROPROCESSOR CHIPS;

EID: 0034857633     PISSN: 19308868     EISSN: None     Source Type: Journal    
DOI: 10.1109/VTSA.2001.934531     Document Type: Article

References (4)

1. Multi-dimensional quantum effect simulation using a density-gradient model and script-level programming techniques
2. Modeling and simulation of phonon boundary scattering in PDE-based device simulators
3. Thermal conductivity of isotopically enriched silicon