The design of fast-settling three-stage amplifiers using the open-loop damping factor as a design parameter

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 57, Issue 6, 2010, Pages 1244-1254

  Nguyen, Ray ^a   Murmann, Boris ^a  

^a Stanford University   (United States)

Author keywords

Optimal settling performance; Phase margin; Three stage amplifier

Indexed keywords

CMOS TECHNOLOGY; DAMPING FACTORS; DESIGN PARAMETERS; DYNAMIC RANGE; GAIN-BANDWIDTH PRODUCTS; OPEN LOOPS; PHASE MARGINS; SETTLING TIME; SPICE SIMULATIONS; THIRD-ORDER; THREE-STAGE AMPLIFIERS;

CMOS INTEGRATED CIRCUITS; DAMPING; DESIGN; OPTIMIZATION; SPICE;

AMPLIFIERS (ELECTRONIC);

EID: 77953478588     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2009.2031763     Document Type: Article

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