Advances in reversed nested Miller compensation

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 54, Issue 7, 2007, Pages 1459-1470

  Grasso, Alfio Dario ^a   Palumbo, Gaetano ^a   Pennisi, Salvatore ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

Analog integrated circuits; CMOS; Feedback amplifier; Frequency compensation; Multistage amplifier

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; RESISTORS; TOPOLOGY; TRANSCONDUCTANCE;

ANALOG INTEGRATED CIRCUITS; FREQUENCY COMPENSATION; MILLER COMPENSATION; MULTISTAGE AMPLIFIER; TRANSCONDUCTANCE AMPLIFIER;

FEEDBACK AMPLIFIERS;

EID: 34547120455     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2007.900170     Document Type: Article

References (25)

1. E. M. Cherry, "Nested differentiating feedback loops in simple audio power amplifier," J. Audio Eng. Soc., vol. 30, pp. 295-305, May 1982.
2. J. H. Huijsing and D. Linebarger, "Low-voltage operational amplifier with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, vol. SC.-20, no. 6, pp. 1144-1150, Dec. 1985.
3. S. Pernici, G. Nicollini, and R. Castello, "A CMOS low distortion fully differential power amplifier with double nested Miller compensation," IEEE J. Solid-State Circuits, vol. 28, no. 7, pp. 758-763, Jul. 1993.
4. R. G. H. Eschauzier and J. H. Huijsing, Frequency Compensation Techniques for Low-Power Operational Amplifiers. Boston: Kluwer, 1995.
5. G. Palumbo and S. Pennisi, Feedback Amplifiers: Theory and Design. Boston: Kluwer, 2002.
6. K. N. Leung and P. K. T. Mok, "Analysis of multistage amplifier-frequency compensation," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no. 9, pp. 1041-1056, Sep. 2001.
7. G. Palumbo and S. Pennisi, "Design methodology and advances in Nested-Miller compensation," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 49, no. 7, pp. 893-903, Jul. 2002.
8. R. G. H. Eschauzier and J. H. Huijsing, "A 100-MHz 100-dB operational amplifier with multipath nested Miller compensation," IEEE J. Solid-State Circuits, vol. 27, no. 12, pp. 1709-1716, Dec. 1992.
9. F. You, S. Embabi, and E. Sanchez-Sinencio, "Multistage amplifier topologies with nested Gm-C compensation," IEEE J. Solid-State Circuits, vol. 32, pp. 2000-2011, Dec. 1997.
10. K. N. Leung and P. K. T. Mok, "Nested Miller compensation in lowpower CMOS design," IEEE Trans. Circuits Syst. II, Analog. Digit. Signal Process., vol. 48, pp. 388-394, Apr. 2001.
11. K. N. Leung, P. K. T. Mok, W. H. Ki, and J. K. O. Sin, "Three-stage large capacitive load amplifier with damping-factor-control frequency compensation," IEEE J. Solid-State Circuits, vol. 35, pp. 221-230, Feb. 2000.
12. H. Lee and P. K. T. Mok, "Active-feedback frequency-compensation technique for low-power multistage amplifiers," IEEE J. Solid-State Circuits, vol. 38, pp. 511-520, Mar. 2003.
13. H. Lee and P. K. T. Mok, "Advances in active-feedback frequency compensation with power optimization and transient improvement," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 51, pp. 1690-1696, Sep. 2004.
14. X. Peng and W. Sansen, "AC boosting compensation scheme for lowpower multistage amplifiers," IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 2074-2077, Nov. 2004.
15. X. Peng and W. Sansen, "Transconductance with capacitances feedback compensation for multistage amplifiers," IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1515-1520, Jul. 2005.
16. A. D. Grasso, G. Palumbo, and S. Pennisi, "Three-stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme," IEEE Trans Circuits Syst. II, Exp. Briefs, vol. 53, no. 10, pp. 1044-1048, Oct. 2006.
17. R. Mita, G. Palumbo, and S. Pennisi, "Design guidelines for reversed nested Miller compensation in three-stage amplifiers," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 5, pp. 227-233, May 2003.
18. K.-P. Ho, C.-F. Chan, C.-S. Choy, and K.-P. Pun, "Reversed nested Miller compensation with voltage buffer and nulling resistor," IEEE J. Solid-State Circuits, vol. 38, pp. 1735-1738, Oct. 2003.
19. F. Zu, S. Yan, J. Hu, and E. Sanchez-Sinencio, "Feedforward reversed nested Miller compensation techniques for three-stage amplifiers," in Proc. IEEE ISCAS'05, May 2005, vol. 1, pp. 2575-2578.
20. A. D. Grasso, G. Palumbo, and S. Pennisi, "Active reversed nested Miller compensation for three-stage amplifiers," in Proc. IEEE ISCAS'06, May 2005, vol. 1, pp. 911-914.
21. X. Fan, C. Mishra, and E. Sanchez-Sinencio, "Single Miller capacitor frequency compensation technique for low-power multistage amplifiers," IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1735-1738, Oct. 2003.
22. A. D. Grasso, G. Palumbo, and S. Pennisi, "Analytical comparison of frequency compensation techniques in three-stage amplifiers," Journal of Circuit Theory and Applications, in press.
23. A. Pugliese, G. Cappuccino, and G. Cocorullo, "Nested Miller compensation capacitor sizing rules for fast-settling amplifier design," Electron. Lett., vol. 40, no. 10, pp. 573-575, May 2005.
24. G. Giustolisi and G. Palumbo, "An approach to test the open-loop parameters of feedback amplifiers," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 49, no. 1, pp. 70-75, Jan. 2002.
25. H. Yang and D. Allstot, "Considerations for fast settling operational amplifiers," IEEE Trans. Circuits Syst., vol. 37, no. 3, pp. 326-334, Mar. 1990.