Copper line topology impact on the SiOCH low-k reliability in sub 45nm technology node. From the Time-Dependent Dielectric Breakdown to the product lifetime

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2009, Pages 606-612

  Vilmay, M ^a,b   Roy, D ^a   Monget, C ^a   Volpi, F ^b   Chaix, J M ^b  

^a STMICROELECTRONICS   (France)

^b UNIV GRENOBLE ALPES   (France)

Author keywords

Copper line topology; Lifetime model; Low k reliability; Microelectronic

Indexed keywords

45NM TECHNOLOGY; ANALYTICAL MODEL; COPPER INTERCONNECTS; COPPER LINE TOPOLOGY; COPPER LINES; CRITICAL DIMENSION; DIELECTRIC BREAKDOWNS; FIRST ORDER; LIFETIME MODEL; LINE EDGE ROUGHNESS; LINE-TO-LINE SPACING; LOW K DIELECTRICS; LOW-K RELIABILITY; PRODUCT LIFETIME; TIME-DEPENDENT DIELECTRIC BREAKDOWN; TOPOLOGICAL EFFECTS;

COPPER; DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; ELECTRON BEAM LITHOGRAPHY; MICROELECTRONICS; NANOTECHNOLOGY; OPTICAL INTERCONNECTS; PHOTORESISTS; ROUGHNESS MEASUREMENT; TOPOLOGY;

RELIABILITY;

EID: 70449133371     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2009.5173318     Document Type: Conference Paper

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