Understanding barrier engineered charge-trapping NAND flash devices with and without high-k dielectric

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2009, Pages 874-882

  Lue, Hang Ting ^a   Lai, Sheng Chih ^a   Hsu, Tzu An ^a   Du, Pei Ying ^a   Wang, Szu Yu ^a   Hsieh, Kuang Yeu ^a   Liu, Rich ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

Barrier engineering; BE SONOS; Charge trapping device; Modeling; NAND flash; Tunneling

Indexed keywords

BARRIER ENGINEERING; BE-SONOS; CHARGE-TRAPPING DEVICE; MODELING; NAND FLASH; TUNNELING;

APPROXIMATION THEORY; DIELECTRIC MATERIALS; ELECTRON TUNNELING; SCHRODINGER EQUATION; TUNNELING (EXCAVATION); WIND TUNNELS;

CHARGE TRAPPING;

EID: 70449115477     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2009.5173370     Document Type: Conference Paper

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