Scaling evaluation of BE-SONOS NAND flash beyond 20 nm

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2008, Pages 116-117

  Lue, Hang Ting ^a   Hsu, Tzu Hsuan ^a   Lai, S C ^a   Hsiao, Y H ^a   Peng, W C ^a   Liao, C W ^a   Huang, Y F ^a   Hong, S P ^a   Wu, M T ^a   Hsu, F H ^a   Lien, N Z ^a   Wang, S Y ^a   Yang, L W ^a   Yang, T ^a   Chen, K C ^a   Hsieh, K Y ^a   Liu, Rich ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE TRAPPING; DATA STORAGE EQUIPMENT; OPTICAL DESIGN; SEMICONDUCTING SILICON; SPEECH ANALYSIS;

DATA-RETENTION; EDGE EFFECTS; INNOVATIVE PROCESSES; LIFE-TIME; LOW ENERGIES; NAND FLASH; READ CURRENT; READ DISTURB; SHORT-CHANNEL EFFECT; TILT ANGLES; VLSI TECHNOLOGIES;

TECHNOLOGY;

EID: 51949115623     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2008.4588584     Document Type: Conference Paper

References (3)

1. H. T. Lue et al, in IEDM Tech. Dig., 2005, pp. 547-550.
2. H. T. Lue et al, in IEDM Tech. Dig., 2007, pp. 161-164.
3. T. H. Hsu et al, in IEDM Tech. Dig., 2007, pp. 913-916.