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Volumn , Issue , 2007, Pages 177-183

A novel gate-sensing and channel-sensing transient analysis method for real-time monitoring of charge vertical location in sonos-type devices and its applications in reliability studies

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE DENSITY; CHARGE TRAPPING; GATES (TRANSISTOR); RELIABILITY ANALYSIS; SEMICONDUCTOR STORAGE; TRANSIENT ANALYSIS;

EID: 34548801394     PISSN: 00999512     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2007.369889     Document Type: Conference Paper
Times cited : (16)

References (11)
  • 1
    • 34548786974 scopus 로고    scopus 로고
    • K. Kim, Technology for sub 50 nm node DRAM and NAND Flash Manufacturing, Tech. Digest 2005 International Electron Devices Meeting, pp. 539-543, 2005.
    • K. Kim, "Technology for sub 50 nm node DRAM and NAND Flash Manufacturing", Tech. Digest 2005 International Electron Devices Meeting, pp. 539-543, 2005.
  • 2
    • 33847734692 scopus 로고    scopus 로고
    • H. T. Lue, S. Y. Wang, E. K. Lai, Y. H. Shih, S. C. Lai, L. W. Yang, K. C. Chen, J. Ku, K. Y. Hsieh, R. Liu, and C. Y. Lu, BE-SONOS: A Bandgap Engineered SONOS with Excellent Performance and Reliability, Tech. Digest 2005 International Electron Devices Meeting, pp. 547-550, 2005.
    • H. T. Lue, S. Y. Wang, E. K. Lai, Y. H. Shih, S. C. Lai, L. W. Yang, K. C. Chen, J. Ku, K. Y. Hsieh, R. Liu, and C. Y. Lu, "BE-SONOS: A Bandgap Engineered SONOS with Excellent Performance and Reliability", Tech. Digest 2005 International Electron Devices Meeting, pp. 547-550, 2005.
  • 4
    • 33847749484 scopus 로고    scopus 로고
    • Y. Shin, J. Choi, C. Kang, C. Lee, K.T. Park, J.S. Lee, J. Sel, V. Kim, B. Choi, J. Sim, D. Kim, H.J. Cho and K. Kim, A Novel NAND-type MONOS Memory using 63nm Process Technology for Multi-Gigabit Flash EEPROMs, Tech. Digest 2005 International Electron Devices Meeting, pp. 327-330, 2005.
    • Y. Shin, J. Choi, C. Kang, C. Lee, K.T. Park, J.S. Lee, J. Sel, V. Kim, B. Choi, J. Sim, D. Kim, H.J. Cho and K. Kim, "A Novel NAND-type MONOS Memory using 63nm Process Technology for Multi-Gigabit Flash EEPROMs", Tech. Digest 2005 International Electron Devices Meeting, pp. 327-330, 2005.
  • 5
    • 0033728046 scopus 로고    scopus 로고
    • Charge retention of scaled SONOS non-volatile memory devices at elevated temperatures
    • Y. Yang and M. White, "Charge retention of scaled SONOS non-volatile memory devices at elevated temperatures", Solid-State Electronic, vol. 44, pp. 949-958, 2000,
    • (2000) Solid-State Electronic , vol.44 , pp. 949-958
    • Yang, Y.1    White, M.2
  • 7
    • 36749115697 scopus 로고
    • Traps created at the interface between the nitride and the oxide on the nitride by thermal oxidation
    • E. Suzuki, Y. Hayashi, K. Ishii, and T. Tsuchiya, "Traps created at the interface between the nitride and the oxide on the nitride by thermal oxidation", Appl. Phys. Lett., vol. 42, pp. 608-610, 1983.
    • (1983) Appl. Phys. Lett , vol.42 , pp. 608-610
    • Suzuki, E.1    Hayashi, Y.2    Ishii, K.3    Tsuchiya, T.4
  • 9
    • 10644273634 scopus 로고    scopus 로고
    • A transient analysis method to characterize the trap vertical location in nitride-trapping devices
    • H. T. Lue, Y. H. Shih, K. Y. Hsieh, R. Liu, and C. Y. Lu, "A transient analysis method to characterize the trap vertical location in nitride-trapping devices", IEEE Electron Device Letters, vol. 25, pp.816-818, 2004.
    • (2004) IEEE Electron Device Letters , vol.25 , pp. 816-818
    • Lue, H.T.1    Shih, Y.H.2    Hsieh, K.Y.3    Liu, R.4    Lu, C.Y.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.