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Applied Physics Letters

Volumn 95, Issue 6, 2009, Pages

Gate-bias stress in amorphous oxide semiconductors thin-film transistors

(8) Lopes, M E a Gomes, H L a Medeiros, M C R a Barquinha, P b Pereira, L b Fortunato, E b Martins, R b Ferreira, I b

a UNIVERSITY OF ALGARVE (Portugal)

b Center of Excellence in Microelectronics Optoelectronics and Processes (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS OXIDE SEMICONDUCTORS; AMORPHOUS SILICON TRANSISTORS; GATE-BIAS STRESS; INDIUM ZINC OXIDES; QUANTITATIVE STUDY; ROOM TEMPERATURE; STANDARD ANALYSIS; STRETCHED EXPONENTIAL RELAXATIONS; THERMAL SILICON; THRESHOLD VOLTAGE SHIFTS; THRESHOLD-VOLTAGE SHIFT; TRAP SITES;

ACTIVATION ENERGY; AMORPHOUS FILMS; CHARGE TRAPPING; GATE DIELECTRICS; GATES (TRANSISTOR); INDIUM; RELAXATION PROCESSES; SEMICONDUCTING ORGANIC COMPOUNDS; SILICON COMPOUNDS; SILICON OXIDES; THIN FILM DEVICES; THIN FILM TRANSISTORS; THRESHOLD VOLTAGE; TRANSISTORS; WATER VAPOR; ZINC; ZINC OXIDE;

AMORPHOUS SILICON;

EID: 69049119241 PISSN: 00036951 EISSN: None Source Type: Journal
DOI: 10.1063/1.3187532 Document Type: Article

Times cited : (227)

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