Obtaining microprocessor vulnerability factor using formal methods

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2008, Pages 63-71

  Shazli, Syed Z ^a   Tahoori, Mehdi B ^a  

^a NORTHEASTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN SATISFIABILITY; BOOLEAN SATISFIABILITY PROBLEMS; COMPUTATION PROBLEMS; DOWN-SCALING; RADIATION-INDUCED; RELIABILITY PARAMETERS; RISC PROCESSORS; RUN-TIME ERRORS; SOFT ERROR; SOFT ERROR RATE;

BOOLEAN FUNCTIONS; ERROR CORRECTION; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; FORMAL LOGIC; FORMAL METHODS; PROBABILITY DENSITY FUNCTION; QUALITY ASSURANCE; REDUCED INSTRUCTION SET COMPUTING;

MICROPROCESSOR CHIPS;

EID: 67649980069     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2008.52     Document Type: Conference Paper

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