On figures of merit in reversible and quantum logic designs

Quantum Information Processing

Volumn 8, Issue 4, 2009, Pages 297-318

  Mohammadi, Majid ^a   Eshghi, Mohammad ^a  

^a SHAHID BEHESHTI UNIVERSITY   (Iran)

Author keywords

Constant inputs; Delay; Garbage outputs; Quantum circuit; Quantum cost; Reversible logic; Weighted number of gates

Indexed keywords

CONSTANT INPUTS; DELAY; GARBAGE OUTPUTS; QUANTUM CIRCUIT; QUANTUM COST; REVERSIBLE LOGIC; WEIGHTED NUMBER OF GATES;

COSTS; DELAY CIRCUITS; LOGIC DESIGN; LOGIC GATES; QUANTUM THEORY; SWITCHING CIRCUITS;

LOGIC CIRCUITS;

EID: 67349161624     PISSN: 15700755     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11128-009-0106-0     Document Type: Article

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