Geometric effect elimination and reliable trap state density extraction in charge pumping of polysilicon thin-film transistors

IEEE Electron Device Letters

Volumn 30, Issue 5, 2009, Pages 517-519

  Lu, Lei ^a   Wang, Mingxiang ^a   Wong, Man ^b  

^a SOOCHOW UNIVERSITY   (China)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Charge pumping (CP); Geometric effect; Polysilicon; Thin film transistors; Trap state density

Indexed keywords

BAND GAPS; CHARGE PUMPING; CHARGE PUMPING (CP); CHARGE PUMPING TECHNIQUE; CONVENTIONAL APPROACH; ENERGY DISTRIBUTIONS; GATE PULSE; GEOMETRIC COMPONENT; GEOMETRIC EFFECT; GEOMETRIC EFFECTS; MOSFETS; POLYSILICON THIN-FILM TRANSISTORS; TRANSITION TIME; TRAP STATE DENSITY;

POLYSILICON; PUMPS; SEMICONDUCTING ORGANIC COMPOUNDS; THIN FILM DEVICES; TRANSISTORS;

THIN FILM TRANSISTORS;

EID: 65949097267     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2017037     Document Type: Article

References (18)

1. G. Groeseneken, H. E. Maes, N. Beltran, and R. F. De Keersmaecker, "A reliable approach to charge-pumping measurements in MOS transistors," IEEE Trans. Electron Devices, vol. ED-31, no. 1, pp. 42-53, Jan. 1984.
2. C. R. Viswanathan and V. Ramgopal Rao, "Application of charge pumping technique for sub-micron MOSFET characterization," Microelectron. Eng., vol. 40, no. 3, pp. 131-146, Nov. 1998.
3. D. Bauza, "Rigorous analysis of two-level charge pumping: Application to the extraction of interface trap concentration versus energy profiles in metal-oxide-semiconductor transistors," J. Appl. Phys., vol. 94, no. 5, pp. 3239-3248, Sep. 2003.
4. C. Wenliang, A. Balasinski, and T.-P. Ma, "A charge pumping method for rapid determination of interface-trap parameters in metal-oxide-semiconductor devices," Rev. Sci. Instrum., vol. 63, no. 5, pp. 3188-3190, May 1992.
5. G. Van den Bosch, G. Groeseneken, and H. E. Maes, "On the geometric component of charge-pumping current in MOSFETs," IEEE Electron Device Lett., vol. 14, no. 3, pp. 107-109, Mar. 1993.
6. M. Koyanagi, I.-W.Wu, A. G. Lewis, M. Fuse, and R. Bruce, "Evaluation of polycrystalline silicon thin film transistors with the charge pumping technique," in IEDM Tech. Dig., 1990, pp. 863-866.
7. M. Koyanagi, Y. Baba, K. Hata, I.-W. Wu, A. G. Lewis, M. Fuse, and R. Bruce, "The charge-pumping technique for grain boundary trap evaluation in polysilicon TFTs," IEEE Electron Device Lett., vol. 13, no. 3, pp. 152-154, Mar. 1992.
8. G.-W. Lee, J.-W. Lee, and C.-H. Han, "Substrate resistance effect on charge-pumping current in polycrystalline silicon thin film transistors," Jpn. J. Appl. Phys., vol. 38, no. 4B, pp. 2656-2659, Apr. 1999.
9. K.-J. Kim and O. Kim, "Identification of grain-boundary trap properties using three-level charge-pumping technique in polysilicon thinfilm transistors," Jpn. J. Appl. Phys., vol. 36, no. 3B, pp. 1394-1397, Mar. 1997.
10. N. S. Saks, S. Batra, and M. Manning, "Charge pumping in thin film transistors," Microelectron. Eng., vol. 28, no. 1-4, pp. 379-382, Nov. 1995.
11. K.-J. Kim, W.-K. Park, S.-G. Kim, K.-M. Lim, I.-G. Lim, and O. Kim, "A new charge pumping model considering bulk trap states in polysilicon thin film transistor," Solid-State Electron., vol. 42, no. 11, pp. 1897-1903, Nov. 1998.
12. O. Kim and K.-J. Kim, "Charge pumping investigations on parasitic regions in polysilicon TFT," Electron. Lett., vol. 34, no. 8, pp. 809-811, Apr. 1998.
13. A. Balasinski, J. Worley, M. Zamanian, and F. T. Liou, "Reference voltages and their stress-induced changes in thin film transistors as determined by charge pumping," in IEDM Tech. Dig., 1995, pp. 529-532.
14. C.-Y. Chen, M.-W. Ma, W.-C. Chen, H.-Y. Lin, K.-L. Yeh, S.-D. Wang, and T.-F. Lei, "Analysis of negative bias temperature instability in bodytied low-temperature polycrystalline silicon thin-film transistors," IEEE Electron Device Lett., vol. 29, no. 2, pp. 165-167, Feb. 2008.
15. L. Pichon, A. Boukhenoufa, C. Cordier, and B. Cretu, "Determination of interface state distribution in polysilicon thin film transistors from low-frequency noise measurements: Application to analysis of electrical properties," J. Appl. Phys., vol. 100, no. 5, p. 054 504, Sep. 2006.
16. G. A. Armstrong, S. Uppal, S. D. Brotherton, and J. R. Ayres, "Differentiation of effects due to grain and grain boundary traps in laser annealed poly-Si thin film transistors," Jpn. J. Appl. Phys. vol. 37, no. 4A, pp. 1721-1726, Apr. 1998.
17. H. Ikeda, "Evaluation of grain boundary trap states in polycrystallinesilicon thin-film transistors by mobility and capacitance measurements," J. Appl. Phys., vol. 91, no. 7, pp. 4637-4645, Apr. 2002.
18. B. Zhang, Z. Meng, S. Zhao, M. Wong, and H.-S. Kwok, "Polysilicon thin film-transistors with uniform and reliable performance using solution-based metal-induced crystallization," IEEE Trans. Electron Devices, vol. 54, no. 5, pp. 1244-1248, May 2007.