-
1
-
-
15844407150
-
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
-
R. Chau, S. Datta, M. Doczy, B. Doyle, B. Jin, J. Kavalieros, A. Majumdar, M. Metz and M. Radosavljevic, Benchmarking nanotechnology for high-performance and low-power logic transistor applications, IEEE Trans. Nanotechnol, 4(2), 153-158 (2005).
-
(2005)
IEEE Trans. Nanotechnol
, vol.4
, Issue.2
, pp. 153-158
-
-
Chau, R.1
Datta, S.2
Doczy, M.3
Doyle, B.4
Jin, B.5
Kavalieros, J.6
Majumdar, A.7
Metz, M.8
Radosavljevic, M.9
-
2
-
-
0038528479
-
3 thin films on GaAs(OOl) substrate by molecular-beam epitaxy
-
3 thin films on GaAs(OOl) substrate by molecular-beam epitaxy, Appl. Phys. Lett., 82(18), 2978-2980 (2003).
-
(2003)
Appl. Phys. Lett
, vol.82
, Issue.18
, pp. 2978-2980
-
-
Yu, Z.1
Overgaard, C.M.2
Droopad, R.3
Passlack, M.4
Abrokwah, J.K.5
-
3
-
-
0036714908
-
Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor
-
M. Passlack, J. K. Abrokwah, R. Droopad, Z. Yu, C. Overgaard, S. I. Yi, M. Hale, J. Sexton and A. C. Kummel, Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor, IEEE Electron Device Lett., 23(9), 508-510(2002).
-
(2002)
IEEE Electron Device Lett
, vol.23
, Issue.9
, pp. 508-510
-
-
Passlack, M.1
Abrokwah, J.K.2
Droopad, R.3
Yu, Z.4
Overgaard, C.5
Yi, S.I.6
Hale, M.7
Sexton, J.8
Kummel, A.C.9
-
4
-
-
27144542816
-
Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors
-
A. A. Demkov and A. Navrotsky, Eds, Dortrecht, The Netherlands: Springer
-
M. Passlack, Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors, in Materials Fundamentals of Gate Dielectrics, A. A. Demkov and A. Navrotsky, Eds., Dortrecht, The Netherlands: Springer, 403-467 (2005).
-
(2005)
Materials Fundamentals of Gate Dielectrics
, pp. 403-467
-
-
Passlack, M.1
-
5
-
-
64949132235
-
-
M. Passlack, M. Heyns and I. Thayne, III-Vs and Ge look to help CMOS, Compound Semiconductor, 14(4), 21-24 (2008).
-
M. Passlack, M. Heyns and I. Thayne, III-Vs and Ge look to help CMOS, Compound Semiconductor, 14(4), 21-24 (2008).
-
-
-
-
6
-
-
33750601101
-
Enhancement mode metal-oxide-semiconductor-field effect transistor,
-
U.S. Patent 6 963 090, Nov. 8
-
M. Passlack, O, Hartin, M. Ray and N. Medendorp, Enhancement mode metal-oxide-semiconductor-field effect transistor, U.S. Patent 6 963 090, Nov. 8, 2005.
-
(2005)
-
-
Passlack, M.1
Hartin, O.2
Ray, M.3
Medendorp, N.4
-
7
-
-
33750587582
-
Implant-free, high mobility flatband MOSFET: Principles of operation
-
M. Passlack, K. Rajagopalan, J. Abrokwah and R. Droopad, Implant-free, high mobility flatband MOSFET: Principles of operation, IEEE Trans. Electron Dev., 53(10), 2454-2459 (2006).
-
(2006)
IEEE Trans. Electron Dev
, vol.53
, Issue.10
, pp. 2454-2459
-
-
Passlack, M.1
Rajagopalan, K.2
Abrokwah, J.3
Droopad, R.4
-
8
-
-
1942420687
-
Monte Carlo simulations of III-V MOSFETs
-
K. Kalna, M. Boriçi, L. Yang and A. Asenov, Monte Carlo simulations of III-V MOSFETs, Semicond. Sci. Technol., 19(4), S202-S205 (2004).
-
(2004)
Semicond. Sci. Technol
, vol.19
, Issue.4
-
-
Kalna, K.1
Boriçi, M.2
Yang, L.3
Asenov, A.4
-
9
-
-
0036568336
-
Scaling of pseudomorphic high electron mobility transistors to decanano dimensions
-
K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. Thayne, Scaling of pseudomorphic high electron mobility transistors to decanano dimensions, Solid-State Electron., 46(5), 631-638 (2002).
-
(2002)
Solid-State Electron
, vol.46
, Issue.5
, pp. 631-638
-
-
Kalna, K.1
Roy, S.2
Asenov, A.3
Elgaid, K.4
Thayne, I.5
-
10
-
-
84907687310
-
.48As HEMT technology utilizing a non-annealed ohmic contact strategy
-
J. Franca and P. Freitas, Eds, Estoril, Portugal
-
.48As HEMT technology utilizing a non-annealed ohmic contact strategy, in Proc. ESSDERC 2003, J. Franca and P. Freitas, Eds., Estoril, Portugal, 315-318 (2003).
-
(2003)
Proc. ESSDERC
, pp. 315-318
-
-
Moran, D.A.J.1
Kalna, K.2
Boyd, E.3
McEwan, F.4
McLelland, H.5
Zhuang, L.L.6
Stanley, C.R.7
Asenov, A.8
Thayne, I.9
-
12
-
-
0034316565
-
Effective potentials and the onset of quantization in ultrasmall MOSFETs
-
D. K. Ferry, Effective potentials and the onset of quantization in ultrasmall MOSFETs, Superlatt. Microstruct., 28(5-6), 419-423 (2000).
-
(2000)
Superlatt. Microstruct
, vol.28
, Issue.5-6
, pp. 419-423
-
-
Ferry, D.K.1
-
13
-
-
33751414042
-
Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications
-
G. Ghibaudo T. Skotnicki, S. Cristoloveneanu, and M. Brillouët, Eds
-
K. Kalna, L. Yang and A. Asenov, Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications, in Proc. ESSDERC 2005, G. Ghibaudo T. Skotnicki, S. Cristoloveneanu, and M. Brillouët, Eds., 169-172 (2005).
-
(2005)
Proc. ESSDERC
, pp. 169-172
-
-
Kalna, K.1
Yang, L.2
Asenov, A.3
-
14
-
-
0036610454
-
Impact of strong quantum confinement on the performance of a highly asymmetric device structure: Monte Carlo particle-based simulation of a focused-ion-beam MOSFET
-
I. Knezevic, D. Z. Vasileska and D. K. Ferry, Impact of strong quantum confinement on the performance of a highly asymmetric device structure: Monte Carlo particle-based simulation of a focused-ion-beam MOSFET, IEEE Trans. Electron Devices, 49(6), 1019-1026 (2002).
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.6
, pp. 1019-1026
-
-
Knezevic, I.1
Vasileska, D.Z.2
Ferry, D.K.3
-
15
-
-
0036252057
-
Study of a 50-nm nMOSFET by Ensemble Monte Carlo Simulation Including a New Approach to Surface Roughness and Impurity Scattering in the Si Inversion Layer
-
G. F. Formicone, M. Saraniti, D. Z. Vasileska and D. K. Ferry, Study of a 50-nm nMOSFET by Ensemble Monte Carlo Simulation Including a New Approach to Surface Roughness and Impurity Scattering in the Si Inversion Layer, IEEE Trans. Electron Devices 49, 125 (2002).
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, pp. 125
-
-
Formicone, G.F.1
Saraniti, M.2
Vasileska, D.Z.3
Ferry, D.K.4
-
16
-
-
0036714908
-
Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor
-
M. Passlack, J. K. Abrokwah, R. Droopad, Z. Yu, C. Overgaard, S. I. Yi, M. Hale, J. Sexton and A. C. Kummel, Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor, IEEE Electron Device Lett. 23, 508-510 (2002).
-
(2002)
IEEE Electron Device Lett
, vol.23
, pp. 508-510
-
-
Passlack, M.1
Abrokwah, J.K.2
Droopad, R.3
Yu, Z.4
Overgaard, C.5
Yi, S.I.6
Hale, M.7
Sexton, J.8
Kummel, A.C.9
-
17
-
-
41749110294
-
Theoretical Study of Some Physical Aspects of Electronic Transport in nMOSFETs at the 10-nm Gate-Length
-
M. V. Fischetti, T. P. O'Regan, S. Narayanan, C. Sachs, S. Jin, J. Kim and Y. Zhang, Theoretical Study of Some Physical Aspects of Electronic Transport in nMOSFETs at the 10-nm Gate-Length, IEEE Trans. Electron Devices 54, 2116-2136 (2007).
-
(2007)
IEEE Trans. Electron Devices
, vol.54
, pp. 2116-2136
-
-
Fischetti, M.V.1
O'Regan, T.P.2
Narayanan, S.3
Sachs, C.4
Jin, S.5
Kim, J.6
Zhang, Y.7
-
18
-
-
31144469815
-
3 dielectric stacks on GaAs
-
Development methodology for high-κ gate dielectrics on III-V semiconductors
-
3 dielectric stacks on GaAs. J. Vac. Sci. Technol. B, 23(4), 1773-1781 (2005).
-
(2005)
J. Vac. Sci. Technol. B
, vol.23
, Issue.4
, pp. 1773-1781
-
-
Passlack, M.1
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