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Volumn , Issue , 2009, Pages 92-95

High-performance In0.75Ga0.25As Implant-Free n-type MOSFETs for low power applications

Author keywords

[No Author keywords available]

Indexed keywords

DEVICE PERFORMANCE; DEVICE SIMULATORS; DRAIN BIAS; FINITE ELEMENTS; GATE LENGTHS; HIGH-PERFORMANCE CMOS; LOW BIAS; LOW POWER APPLICATIONS; MONTE CARLO; MOSFETS; NOVEL ARCHITECTURES;

EID: 64949090446     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SCED.2009.4800438     Document Type: Conference Paper
Times cited : (1)

References (18)
  • 4
    • 27144542816 scopus 로고    scopus 로고
    • Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors
    • A. A. Demkov and A. Navrotsky, Eds, Dortrecht, The Netherlands: Springer
    • M. Passlack, Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors, in Materials Fundamentals of Gate Dielectrics, A. A. Demkov and A. Navrotsky, Eds., Dortrecht, The Netherlands: Springer, 403-467 (2005).
    • (2005) Materials Fundamentals of Gate Dielectrics , pp. 403-467
    • Passlack, M.1
  • 5
    • 64949132235 scopus 로고    scopus 로고
    • M. Passlack, M. Heyns and I. Thayne, III-Vs and Ge look to help CMOS, Compound Semiconductor, 14(4), 21-24 (2008).
    • M. Passlack, M. Heyns and I. Thayne, III-Vs and Ge look to help CMOS, Compound Semiconductor, 14(4), 21-24 (2008).
  • 6
    • 33750601101 scopus 로고    scopus 로고
    • Enhancement mode metal-oxide-semiconductor-field effect transistor,
    • U.S. Patent 6 963 090, Nov. 8
    • M. Passlack, O, Hartin, M. Ray and N. Medendorp, Enhancement mode metal-oxide-semiconductor-field effect transistor, U.S. Patent 6 963 090, Nov. 8, 2005.
    • (2005)
    • Passlack, M.1    Hartin, O.2    Ray, M.3    Medendorp, N.4
  • 7
    • 33750587582 scopus 로고    scopus 로고
    • Implant-free, high mobility flatband MOSFET: Principles of operation
    • M. Passlack, K. Rajagopalan, J. Abrokwah and R. Droopad, Implant-free, high mobility flatband MOSFET: Principles of operation, IEEE Trans. Electron Dev., 53(10), 2454-2459 (2006).
    • (2006) IEEE Trans. Electron Dev , vol.53 , Issue.10 , pp. 2454-2459
    • Passlack, M.1    Rajagopalan, K.2    Abrokwah, J.3    Droopad, R.4
  • 9
    • 0036568336 scopus 로고    scopus 로고
    • Scaling of pseudomorphic high electron mobility transistors to decanano dimensions
    • K. Kalna, S. Roy, A. Asenov, K. Elgaid and I. Thayne, Scaling of pseudomorphic high electron mobility transistors to decanano dimensions, Solid-State Electron., 46(5), 631-638 (2002).
    • (2002) Solid-State Electron , vol.46 , Issue.5 , pp. 631-638
    • Kalna, K.1    Roy, S.2    Asenov, A.3    Elgaid, K.4    Thayne, I.5
  • 12
    • 0034316565 scopus 로고    scopus 로고
    • Effective potentials and the onset of quantization in ultrasmall MOSFETs
    • D. K. Ferry, Effective potentials and the onset of quantization in ultrasmall MOSFETs, Superlatt. Microstruct., 28(5-6), 419-423 (2000).
    • (2000) Superlatt. Microstruct , vol.28 , Issue.5-6 , pp. 419-423
    • Ferry, D.K.1
  • 13
    • 33751414042 scopus 로고    scopus 로고
    • Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications
    • G. Ghibaudo T. Skotnicki, S. Cristoloveneanu, and M. Brillouët, Eds
    • K. Kalna, L. Yang and A. Asenov, Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications, in Proc. ESSDERC 2005, G. Ghibaudo T. Skotnicki, S. Cristoloveneanu, and M. Brillouët, Eds., 169-172 (2005).
    • (2005) Proc. ESSDERC , pp. 169-172
    • Kalna, K.1    Yang, L.2    Asenov, A.3
  • 14
    • 0036610454 scopus 로고    scopus 로고
    • Impact of strong quantum confinement on the performance of a highly asymmetric device structure: Monte Carlo particle-based simulation of a focused-ion-beam MOSFET
    • I. Knezevic, D. Z. Vasileska and D. K. Ferry, Impact of strong quantum confinement on the performance of a highly asymmetric device structure: Monte Carlo particle-based simulation of a focused-ion-beam MOSFET, IEEE Trans. Electron Devices, 49(6), 1019-1026 (2002).
    • (2002) IEEE Trans. Electron Devices , vol.49 , Issue.6 , pp. 1019-1026
    • Knezevic, I.1    Vasileska, D.Z.2    Ferry, D.K.3
  • 15
    • 0036252057 scopus 로고    scopus 로고
    • Study of a 50-nm nMOSFET by Ensemble Monte Carlo Simulation Including a New Approach to Surface Roughness and Impurity Scattering in the Si Inversion Layer
    • G. F. Formicone, M. Saraniti, D. Z. Vasileska and D. K. Ferry, Study of a 50-nm nMOSFET by Ensemble Monte Carlo Simulation Including a New Approach to Surface Roughness and Impurity Scattering in the Si Inversion Layer, IEEE Trans. Electron Devices 49, 125 (2002).
    • (2002) IEEE Trans. Electron Devices , vol.49 , pp. 125
    • Formicone, G.F.1    Saraniti, M.2    Vasileska, D.Z.3    Ferry, D.K.4
  • 18
    • 31144469815 scopus 로고    scopus 로고
    • 3 dielectric stacks on GaAs
    • Development methodology for high-κ gate dielectrics on III-V semiconductors
    • 3 dielectric stacks on GaAs. J. Vac. Sci. Technol. B, 23(4), 1773-1781 (2005).
    • (2005) J. Vac. Sci. Technol. B , vol.23 , Issue.4 , pp. 1773-1781
    • Passlack, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.