Power-aware global signaling strategies

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 604-607

  Sylvester, Dennis ^a   Kaul, Himanshu ^a   Agarwal, Kanak ^b   Rao, Rahul M ^c   Nassif, Sani ^c   Brown, Richard B ^d  

^a UNIVERSITY OF MICHIGAN   (United States)

^b INTEL CORPORATION   (United States)

^c IBM   (United States)

^d UNIVERSITY OF UTAH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE MODE; DESIGN EFFORT; GLOBAL INTERCONNECT; MULTIPLE VOLTAGE; POWER DEMANDS; POWER-AWARE; STATIC AND DYNAMIC; STATIC POWER CONSUMPTION;

EID: 64149123394     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1464660     Document Type: Conference Paper

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