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Volumn 9, Issue 5, 2001, Pages 616-629
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On gate level power optimization using dual-supply voltages
a,b
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Author keywords
Dual supply voltages; Gate level; Maximal weighted independent set; Power optimization; Timing constraints
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Indexed keywords
POWER OPTIMIZATION;
ALGORITHMS;
ELECTRIC POTENTIAL;
ELECTRIC POWER SUPPLIES TO APPARATUS;
ENERGY DISSIPATION;
HEURISTIC METHODS;
LOGIC GATES;
OPTIMIZATION;
TIME MEASUREMENT;
CMOS INTEGRATED CIRCUITS;
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EID: 0035472548
PISSN: 10638210
EISSN: None
Source Type: Journal
DOI: 10.1109/92.953496 Document Type: Article |
Times cited : (90)
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References (27)
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