Wafer level hermetic bonding using Sn/In and Cu/Ti/Au metallization

10th Electronics Packaging Technology Conference, EPTC 2008

Volumn , Issue , 2008, Pages 767-772

  Yu, Daquan ^a   Yan, Liling ^a   Lee, Chengkuo ^a,b   Choi, Won Kyoung ^a   Thew, Meei Ling ^a   Foo, Chin Keng ^a   Lau, John H ^a  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; CHIP SCALE PACKAGES; ELECTRIC BATTERIES; ELECTRONIC EQUIPMENT MANUFACTURE; METALLIZING; RELIABILITY; SEMICONDUCTING INTERMETALLICS; SOLDERING ALLOYS; TESTING;

FREE JOINTS; HERMETICITY; HIGH HUMIDITIES; HIGH TEMPERATURE INTERMETALLICS; HIGH TEMPERATURE STORAGES; HIGH YIELDS; LOW TEMPERATURES; METALLIZATION; PRESSURE COOKER TESTS; RELIABILITY PROPERTIES; RELIABILITY TESTS; SENSOR PACKAGING; SHEAR TESTS; TEMPERATURE CYCLING TESTS; WAFER BONDERS; WAFER LEVELS;

WAFER BONDING;

EID: 63049125020     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2008.4763525     Document Type: Conference Paper

References (12)

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