Charge trapping behavior of SiO2-Anodic Al2O3-SiO2 gate dielectrics for nonvolatile memory applications

Solid-State Electronics

Volumn 53, Issue 3, 2009, Pages 279-284

  Huang, Chun Hsien ^a   Li, En Jui ^a   Chang, Wai Jyh ^b   Wang, Na Fu ^c   Hung, Chen I ^a   Houng, Mau Phon ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b WINBOND ELECTRONICS CORPORATION   (Taiwan)

^c CHENG SHIU UNIVERSITY   (Taiwan)

Author keywords

Anodic Aluminum Oxide (AAO); Double I V method; Flash memory; Post deposition annealing (PDA); SiO2 Al2O3 SiO2 (OAO)

Indexed keywords

ALUMINA; ALUMINUM; ALUMINUM NITRIDE; ANNEALING; DATA STORAGE EQUIPMENT; ELECTRONIC EQUIPMENT TESTING; FLASH MEMORY; GATE DIELECTRICS; GATES (TRANSISTOR); OXIDES; PERSONAL DIGITAL ASSISTANTS; SILICON NITRIDE; SULFUR COMPOUNDS;

ANODIC ALUMINUM OXIDE (AAO); BIAS TESTING; DOUBLE I-V METHOD; FABRICATION PROCESS; FLASH MEMORY DEVICES; NON-VOLATILE MEMORY APPLICATIONS; POST DEPOSITION ANNEALING (PDA); SIO2-AL2O3-SIO2 (OAO); STORAGE LAYERS; STRESS TIME; TRAP ENERGY LEVELS;

CHARGE TRAPPING;

EID: 61349202777     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2008.12.005     Document Type: Article

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