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Volumn , Issue , 2008, Pages 440-443

Impact of NBTI on the performance of 35nm CMOS digital circuits

Author keywords

Degradation; Inverters; Negative bias temperature instability (NBTI); SRAM; Static noise margin

Indexed keywords

CMOS DIGITAL CIRCUITS; CMOS INVERTERS; DEVICE PHYSICS; INVERTERS; LONG TERMS; MOS FETS; NANO-SCALE DEVICES; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); POWER DISSIPATIONS; POWER-SUPPLY VOLTAGES; SRAM; STATIC NOISE MARGIN;

EID: 60749127044     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSICT.2008.4734569     Document Type: Conference Paper
Times cited : (7)

References (22)
  • 1
    • 60749109884 scopus 로고    scopus 로고
    • D. K. Schroder and E. H. Nicollian, J. Appl. Phys., 94, p.l (2003)
    • D. K. Schroder and E. H. Nicollian, J. Appl. Phys., 94, p.l (2003)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.