PMOS NBTI-induced circuit mismatch in advanced technologies

Microelectronics Reliability

Volumn 46, Issue 1, 2006, Pages 63-68

  Agostinelli, M ^a   Lau, S ^a   Pae, S ^a   Marzolf, P ^a   Muthali, H ^a   Jacobs, S ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT THEORY; CMOS INTEGRATED CIRCUITS; PERFORMANCE;

CIRCUIT MISMATCH; NAGATIVE BIAS; PMOS;

TRANSISTORS;

EID: 28844479486     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2005.05.004     Document Type: Article

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