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Volumn 28, Issue 3, 2009, Pages 327-339

Semicustom design of zigzag power-gated circuits in standard cell elements

Author keywords

Leakage; Low power; Power gating; Semicustom; Standard cell; Zigzag power gating (ZPG)

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BENCHMARKING; DESIGN; ELECTRIC BATTERIES; ELECTRIC NETWORK ANALYSIS; ELECTRIC POWER TRANSMISSION NETWORKS; LOGIC DEVICES; SEMICONDUCTOR QUANTUM DOTS; STANDARDS;

EID: 60749094014     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2009.2012532     Document Type: Article
Times cited : (10)

References (23)
  • 2
    • 0029359285 scopus 로고
    • A 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
    • Aug
    • S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, S. Shigematsu, and J. Yamada, "A 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS," IEEE J. Solid-State Circuits, vol. 30, no. 8, pp. 847-854, Aug. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , Issue.8 , pp. 847-854
    • Mutoh, S.1    Douseki, T.2    Matsuya, Y.3    Aoki, T.4    Shigematsu, S.5    Yamada, J.6
  • 4
    • 34047171260 scopus 로고    scopus 로고
    • S. G. Narendra and A. Chandrakasan, Eds, New York: Springer-Verlag
    • S. G. Narendra and A. Chandrakasan, Eds., Leakage in Nanometer CMOS Technologies. New York: Springer-Verlag, 2005.
    • (2005) Leakage in Nanometer CMOS Technologies
  • 6
    • 1542329520 scopus 로고    scopus 로고
    • Understanding and minimizing ground bounce during mode transition of power gating structures
    • Aug
    • S. Kim, S. V. Kosonocky, and D. R. Knebel, "Understanding and minimizing ground bounce during mode transition of power gating structures," in Proc. Int. Symp. Low Power Electron. Des., Aug. 2003, pp. 22-25.
    • (2003) Proc. Int. Symp. Low Power Electron. Des , pp. 22-25
    • Kim, S.1    Kosonocky, S.V.2    Knebel, D.R.3
  • 7
    • 0027698768 scopus 로고
    • Switched-source-impedance CMOS circuit for low standby subthreshold current giga-scale LSIs
    • Nov
    • M. Horiguchi, T. Sakata, and K. Itoh, "Switched-source-impedance CMOS circuit for low standby subthreshold current giga-scale LSIs," IEEE J. Solid-State Circuits, vol. 28, no. 11, pp. 1131-1135, Nov. 1993.
    • (1993) IEEE J. Solid-State Circuits , vol.28 , Issue.11 , pp. 1131-1135
    • Horiguchi, M.1    Sakata, T.2    Itoh, K.3
  • 8
    • 0038306265 scopus 로고    scopus 로고
    • Zigzag super cut-off CMOS (ZSCCMOS) block activation with self-adaptive voltage level controller: An alternative to clock-gating scheme in leakage dominant era
    • Feb
    • K.-S. Min, H. Kawaguchi, and T. Sakurai, "Zigzag super cut-off CMOS (ZSCCMOS) block activation with self-adaptive voltage level controller: an alternative to clock-gating scheme in leakage dominant era," in Proc. Int. Solid-State Circuits Conf., Feb. 2003, pp. 400-401.
    • (2003) Proc. Int. Solid-State Circuits Conf , pp. 400-401
    • Min, K.-S.1    Kawaguchi, H.2    Sakurai, T.3
  • 10
    • 33745168675 scopus 로고    scopus 로고
    • Optimal zigzag (OZ): An effective yet feasible power-gating scheme achieving two orders of magnitude lower standby leakage
    • Jun
    • K.-W. Choi, Y. Xu, and T. Sakurai, "Optimal zigzag (OZ): An effective yet feasible power-gating scheme achieving two orders of magnitude lower standby leakage," in VLSI Symp. Tech. Dig., Jun. 2005, pp. 312-315.
    • (2005) VLSI Symp. Tech. Dig , pp. 312-315
    • Choi, K.-W.1    Xu, Y.2    Sakurai, T.3
  • 14
    • 0032690059 scopus 로고    scopus 로고
    • Layout techniques supporting the use of dual supply voltages for cell-based designs
    • Jun
    • C. Yeh, Y. Kang, S. Shieh, and J. Wang, "Layout techniques supporting the use of dual supply voltages for cell-based designs," in Proc. Des. Autom. Conf., Jun. 1999,'pp. 62-67.
    • (1999) Proc. Des. Autom. Conf , pp. 62-67
    • Yeh, C.1    Kang, Y.2    Shieh, S.3    Wang, J.4
  • 18
    • 0029267889 scopus 로고
    • State assignment for low power dissipation
    • Mar
    • L. Benini and G. D. Micheli, "State assignment for low power dissipation," IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 258-268, Mar. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , Issue.3 , pp. 258-268
    • Benini, L.1    Micheli, G.D.2
  • 19
    • 0036530772 scopus 로고    scopus 로고
    • A fast and elitist multiobjective genetic algorithm: NSGA-II
    • Apr
    • K. Deb, A. Pratap, S. Agarwal, and T. Meyarivan, "A fast and elitist multiobjective genetic algorithm: NSGA-II," IEEE Trans. Evol. Comput., vol. 6, no. 2, pp. 182-197, Apr. 2002.
    • (2002) IEEE Trans. Evol. Comput , vol.6 , Issue.2 , pp. 182-197
    • Deb, K.1    Pratap, A.2    Agarwal, S.3    Meyarivan, T.4
  • 22
    • 84877916442 scopus 로고    scopus 로고
    • Online, Available
    • Opencores, [Online]. Available: http://www.opencores.org/
    • Opencores


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.