Size and thickness effect on the local strain relaxation in patterned strained silicon-on-insulator

Electrochemical and Solid-State Letters

Volumn 12, Issue 4, 2009, Pages

  Gu, Diefeng ^a,b   Zhu, Mingyao ^c   Celler, George K ^d   Baumgart, Helmut ^a,b  

^a Old Dominion University   (United States)

^b OLD DOMINION UNIVERSITY   (United States)

^c Dept of Economics and Thomas Jefferson Program in Public Policy at the College of William and Mary   (United States)

^d PARC TECHNOLOGIQUE DES FONTAINES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

MICROSENSORS; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; STRAIN CONTROL; STRAIN RELAXATION;

CAPPING LAYERS; HIGH-TEMPERATURE ANNEALING; LAYER THICKNESS; LOCAL STRAINS; STRAINED SILICON ON INSULATORS; THICKNESS EFFECTS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 60449083755     PISSN: 10990062     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.3068300     Document Type: Article

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