Circuit-level performance benchmarking and scalability analysis of carbon nanotube transistor circuits

IEEE Transactions on Nanotechnology

Volumn 8, Issue 1, 2009, Pages 37-45

  Patil, Nishant ^a   Deng, Jie ^a   Mitra, Subhasish ^a   Wong, H S Philip ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

Carbon Nanotube (CNT) density; Carbon Nanotube Field Effect Transistors (CNFETs); Circuit performance; Scalability

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRON MULTIPLIERS; ELECTRONIC PROPERTIES; FIELD EFFECT TRANSISTORS; MONTE CARLO METHODS; NANOCOMPOSITES; NANOTUBES; SCALABILITY; SPICE; TRANSISTORS;

ANALYTICAL MODELS; CARBON NANOTUBE (CNT) DENSITY; CARBON NANOTUBE FIELD EFFECT TRANSISTORS (CNFETS); CARBON NANOTUBE TRANSISTORS; CIRCUIT LAYOUTS; CIRCUIT PERFORMANCE; DIAMETER VARIATIONS; DOPING VARIATIONS; LITHOGRAPHIC DIMENSIONS; MONTE CARLO SIMULATIONS; NON-IDEALITIES; PARASITIC RESISTANCES; PERFORMANCE BENCHMARKING; SCALABILITY ANALYSIS; SIMULATION RESULTS; SMALL SIZES; SOURCE AND DRAINS; SPICE MODELS;

CARBON NANOTUBES;

EID: 59049086559     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2008.2006903     Document Type: Article

References (30)

1. J. Deng and H.-S. P. Wong, "A compact SPICE model for carbon nanotube field effect transistors including non-idealities and its application-part I: Model of the intrinsic channel region," IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3186-3194, Dec. 2007.
2. J. Deng and H.-S. P. Wong, "A compact SPICE model for carbon nanotube field effect transistors including non-idealities and its application-part II: Full device model and circuit performance benchmarking," IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3195-3205, Dec. 2007.
3. H.-S. P. Wong, J. Appenzeller, V. Derycke, R. Mattel, S. Wind, and Ph. Avouris, "Carbon nanotube field effect transistors-fabrication, device physics, and circuit implications," in Proc. Int. Solid State Circuits Conf., 2003, pp. 370-371.
4. J. Guo, A. Javey, H. Dai, and M. Lundstrom, "Performance analysis and design optimization of near ballistic carbon nanotube field-effect transistors," in Proc. Int. Electron Devices Meet., Dec. 2004, pp. 703-706.
5. A. Javey, J. Guo, D. B. Farmer, Q. Wang, D. Wang, R. G. Gordon, M. Lundstrom, and H. Dai, "Carbon nanotube field-effect transistors with integrated ohmic contacts and high-K gate dielectrics," Nana Lett., vol. 4, pp. 447-450, 2004.
6. S. Han, X. Liu, and C. Zhou, "Template-free directional growth of singlewalled carbon nanotubes on a- and r-plane Sapphire," J. Amer. Chem. Soc., vol. 127, pp. 5294-5295, 2005.
7. S. J. Kang, C. Kocabas, T. Ozel, M. Shim, N. Pimparkar, M. A. Alam, S. V. Rotkin, and J. A. Rogers, "High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes," Nat. Nanotechnol., vol. 2, pp. 230-236, 2007.
8. C. Kocabas, S. J. Kang, T. Ozel, M. Shim, and J. A. Rogers, "Improved synthesis of aligned arrays of single-walled carbon nanotubes and their implementation in thin film type transistors," J. Phys. Chem. C, vol. 111, no. 48, pp. 17879-17886, 2007.
9. X. Li, L. Zhang, X. Wang, I. Shimoyama, X. Sun, W.-S. Seo, and H. Dai, "Langmuir-Blodgett assembly of densely aligned single-walled carbon nanotubes from bulk materials," J. Amer. Chem. Soc., vol. 129, no. 16, pp. 4890-4891, 2007.
10. J. Deng and H.-S. P. Wong, "A circuit-compatible SPICE model for enhancement mode carbon nanotube field effect transistors," in Proc. Int. Conf. Simul. Semicond. Process. Devices, Sep. 2006, pp. 166-169.
11. I. Amlani, J. Lewis, K. Lee, R. Zhang, J. Deng, and H.-S. P. Wong, "First demonstration of AC gain from a single-walled carbon nanotube commonsource amplifier," in Proc. Int. Electron Devices Meet., 2006, pp. 1-4.
12. [Online], Available: http://www.itrs.net
13. W. Zhao and Y. Cao, "New generation of predictive technology model for sub-45 nm early design exploration," IEEE Trans. Electron Devices, vol. 53, no. 11, pp. 2816-2823, Nov. 2006.
14. [Online]. Available: http://www.eas.asu.edu/~ptm
15. P. J. Burke, "Luttinger liquid theory as a model of the gigahertz electrical properties of carbon nanotubes," IEEE Trans. Nanotechnol., vol. 1, no. 3, pp. 129-144, Sep. 2002.
16. J. Deng and H.-S. P. Wong, "Modeling and analysis of planar gate capacitance for 1-D FET with multiple cylindrical conducting channels," IEEE Trans. Electron Devices, vol. 54, no. 9, pp. 2377-2385, Sep. 2007.
17. D. Kang, N. Park, J. H. Ko, E. Bae, and W. Park, "Oxygen-induced P-type doping of a long individual single-walled carbon nanotube," Nanotechnology, vol. 16, pp. 1048-1052, 2005.
18. J. Chen, C. Klinke, A. Afzali, and P. Avouris, "Self-aligned carbon nanotube transistors with charge transfer doping," Appl. Phys. Lett., vol. 86, no. 477, p. 123108, 2005.
19. Y-C. Tseng, K. Phoa, D. Carlton, and J. Bokor, "Effect of diameter variation in a large set of carbon nanotube transistors," Nana Lett., vol. 6, pp. 1364-1368, 2006.
20. R. Saito, G. Dresselhaus, and M. Dresselhaus, Physical Properties of Carbon Nanotubes. London, U.K.: Imperial College Press, 1998.
21. Y. Li, D. Mann, M. Rolandi, W. Kim, A. Ural, S. Hung, A. Javey, J. Cao, D. Wang, E. Yenilmez, Q. Wang, J. F. Gibbons, Y. Nishi, and H. Dai, "Preferential growth of semiconducting single-walled carbon nanotubes by a plasma enhanced CVD method," Nano Lett., vol. 4, pp. 317-321, 2004.
22. C. Kocabas, H.-S. Kim, T. Banks, J. A. Rogers, A. A. Pesetski, J. E. Baumgardner, S. V. Krishnaswamy, and H. Zhang, "Radio frequency analog electronics based on carbon nanotube transistors," Proc. Natl. Acad. Sci. U.S.A., vol. 105, no. 5, pp. 1405-1409, 2008.
23. M. S. Arnold, A. A. Green, J. F. Hulvat, S. I. Stupp, and M. C. Hersam, "Sorting carbon nanotubes by electronic structure using density differentiation," Nat. Nanotechnol., vol. 1, pp. 60-65, 2006.
24. P. G. Collins, M. S. Arnold, and P. Avouris, "Engineering carbon nanotubes and nanotube circuits using electrical breakdown." Science, vol. 292, pp. 706-709, 2001.
25. G. Zhang, P. Qi, X. Wang, Y. Lu, X. Li, R. Tu, S. Bangsaruntip, D. Mann, L. Zhang, and H. Dai, "Selective etching of metallic carbon nanotubes by gas-phase reaction," Science, vol. 314, pp. 974-977, 2006.
26. J. Zhang, N. Patil, and S. Mitra, "Design guidelines for metallic-carbonnanotube-tolerant digital logic circuits," in Proc. Des. Autom. Test Eur., 2008, pp. 1009-1014.
27. N. Patil, J. Deng, H.-S. P. Wong, and S. Mitra, "Automated design of misaligned-carbon-nanotube-immune circuits," in Proc. 44th Des. Autom. Conf. (DAC), San Diego, CA, Jun. 4-8, 2007, pp. 958-961.
28. N. Patil, A. Lin, E. Myers, H.-S. P. Wong, and S. Mitra, "Integrated waferscale growth and transfer of directional carbon nanotubes and misalignedcarbon-nanotube-immune logic structures," in Proc. Symp. VLSI Technol., 2008, pp. 205-206.
29. A. Keshavarzi, A. Raychowdhury, J. Kurtin, K. Roy, and V. De, "Carbon nanotube field-effect transistors for high-performance digital circuits-Transient analysis, parasitics, and scalability," IEEE Trans. Electron Devices, vol. 53, no. 11, pp. 2718-2726, Nov. 2006.
30. A. Keshavarzi, A. Raychowdhury, J. Kurtin, K. Roy, and V. De, "Scalability of carbon nanotube FET-based circuits," in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2006, pp. 415-418.