Temperature dependence of digital SET pulse width in bulk and SOI technologies

IEEE Transactions on Nuclear Science

Volumn 55, Issue 6, 2008, Pages 2914-2920

  Shuming, Chen ^a   Bin, Liang ^a   Biwei, Liu ^a   Zheng, Liu ^a  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

Author keywords

Bipolar amplification; Bulk and SOI inverter chains; Digital SET; Mixed mode simulation

Indexed keywords

AMPLIFICATION; TEMPERATURE DISTRIBUTION; THREE DIMENSIONAL;

BIPOLAR AMPLIFICATION; BULK AND SOI INVERTER CHAINS; DIGITAL SET; MIXED-MODE SIMULATION; PULSE WIDTHS; PULSE-BROADENING; RISING TEMPERATURES; SOI TECHNOLOGIES; TEMPERATURE DEPENDENCES; TEMPERATURE RISE;

TRANSIENTS;

EID: 58849138827     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2008.2006980     Document Type: Conference Paper

References (20)

1. J. G. Rollins, W. A. Kolasinski, D. C. Marvin, and R. Koga, "Numerical simulation of SEU induced latch-up," IEEE Trans. Nucl. Sci., vol. 33, pp. 1565-1570, Dec. 1986.
2. H. Iwata and T. Ohzone, "Numerical simulation of single event latchup in the temperature range of 77-450 K," IEEE Trans. Nucl. Sci., vol. 42, pp. 148-154, Jun. 1995.
3. M. L. Alles, L. W. Masengill, S. E. Kerns, K. L. Jones, J. E. Clark, and W. F. Kraus, "Effect of temperature-dependent bipolar gain distribution on SEU vulnerability of SOI CMOS SRAMs," in Proc. IEEE Int. SOI Conf., Oct. 1992, pp. 96-97.
4. J. S. Laird, T. Hirao, S. Onoda, H. Mori, and H. Itoh, "Temperature dependence of heavy ion induced current transients in Si epilayer devices," IEEE Trans. Nucl. Sci., vol. 49, pp. 1389-1395, Jun. 2002.
5. G. Guo, T. Hirao, J. S. Laird, S. Onoda, T. Wakasa, T. Yamakawa, and T. Kamiya, "Temperature dependence of single event transient current by heavy ion microbeam on p+/n/n+ epilayer junctions," IEEE Trans. Nucl. Sci., vol. 51, pp. 2834-2839, Oct. 2004.
6. D. Truyen, J. Boch, B. Sagnes, N. Renaud, E. Leduc, S. Arnal, and F. Saigné, 'Temperature effect on heavy-ion induced parasitic current on SRAM by device simulation: Effect on SEU sensitivity," IEEE Trans. Nucl. Sci., vol. 54, no. 4, pp. 1025-1029, Aug. 2007.
7. J. M. Benedetto, P. H. Eaton, D. G. Mavis, M. Gadlage, and T. Turflinger, "Digital single event transient trends with technology node scaling," IEEE Trans. Nucl. Sci., vol. 53, pp. 3462-3465, Dec. 2006.
8. J. Benedetto, P. Eaton, K. Avery, D. Mavis, M. Gadlage, T. Turflinger, P. E. Dodd, and G. Vizkelethyd, "Heavy ion-induced digital singleevent transients in deep submicron processes," IEEE Trans. Nucl. Sci., vol. 6.1, pp. 3480-3485, Dec. 2004.
9. D. Kobayashi, H. Saito, and K. Hirose, "Estimation of single event transient voltage pulses in VLSI circuits from heavy-ion-induced transient currents measured in a single MOSFET," IEEE Trans. Nucl. Sci., vol. 54, pp. 1037-1041, Aug. 2007.
10. M. P. Baze, J. Wert, J. W. Clement, M. G. Hubert, A. Witulski, O. A. Amusan, L. Massengill, and D. McMorrow, "Propagating SET characterization technique for digital CMOS libraries," IEEE Trans. Nucl. Sci., vol. 53, pp. 3472-3478, Dec. 2006.
11. V. Ferlet-Cavrois, P. Paillet, M. Gaillardin, D. Lambert, J. Baggio, J. R. Schwank, G. Vizkelethy, M. R. Shaneyfelt, K. Hirose, E. W. Blackmore, O. Faynot, C. Jahan, and L. Tosti, "Statistical analysis of the charge collected in SOI and bulk devices under heavy ion. and proton irradiation-Implications for digital SETs," IEEE Trans. Nucl. Sci., vol. 53, pp. 3242-3252, Dec. 2006.
12. D. G. Mavis and P. H. Eaton, "SEU and SET modeling and mitigation in deep submicron technologies," in Proc. 45th Annu. Reliability Physics Symp., 2007, pp. 293-305.
13. P. E. Dodd, M. R. Shaneyfelt, J. A. Felix, and J. R. Schwank, "Production and propagation of single-event transients in high-speed digital logic ICs," IEEE Trans. Nucl. Sci., vol. 51, pp. 3278-3284, Dec. 2004.
14. M. Turowski, A. Raman, and G. Jablonski, "Mixed-mode simulation, and analysis of digital single event transients in fast CMOS ICs," in 14th Int. Conf. on Mixed Design of Integrated Circuits and Syst., 2007, pp. 433-438.
15. O. A. Amusan, A. F. Witulski, L. W. Massengill, B. L. Bhuva, P. R. Fleming, M. L. Alles, A. L. Sternberg, J. D. Black, and R. D. Schrimpf, "Charge collection and charge sharing in a 130 nm CMOS technology," IEEE Trans. Nucl. Sci., vol. 53, pp. 3253-3258, Dec. 2006.
16. Sentaurus Device User Guide Version A-2007.12-SP1 Synopsys, 2007.
17. F. E. Emery and T. A. Rabson, "Average energy expended per ionized electron-hole pair in silicon and germanium as a function of temperature," Phys. Rev., vol. 140, no. 6, pp. 2089-2093, 1963.
18. S. DasGupta, "Trends in Single Event Pulse Widths and Pulse Shapes in Deep SubMicro CMOS," M.S. thesis, Vanderbilt Univ., Dept. Electrical. Eng., Tennessee, 2007.
19. P. E. Dodd and L. W. Massengill, "Basic mechanisms and modeling of single-event upset in digital microelectronics," IEEE Trans. Nucl. Sci., vol. 50, pp. 583-602, Jun. 2003.
20. V. Ferlet-Cavrois, G. Vizkelethy, P. Paillet, A. Torres, J. R. Schwank, M. R. Shaneyfelt, J. Baggio, J. du Port de Pontcharra, and L. Tosti, "Charge enhancement effect in NMOS bulk transistors induced by heavy ion irradiation-Comparison with SOI," IEEE Trans. Nucl. Sci., vol. 51, pp. 3255-3262, Dec. 2004.