메뉴 건너뛰기




Volumn 17, Issue 2, 2009, Pages 292-301

Design and implementation of active decoupling capacitor circuits for power supply regulation in digital ICs

Author keywords

Circuit modeling; Integrated circuit (IC) design; Power supply noise

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; DESIGN; DIELECTRIC DEVICES; DIGITAL CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER TRANSMISSION NETWORKS; ELECTRIC POWER UTILIZATION; LAWS AND LEGISLATION; NOISE GENERATORS; OPERATIONAL AMPLIFIERS;

EID: 58849113571     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2004543     Document Type: Article
Times cited : (35)

References (20)
  • 2
    • 2442482721 scopus 로고    scopus 로고
    • Impact of power-supply noise on timing in high-frequency microprocessors
    • Feb
    • M. Saint-Laurent and M. S waminathan, "Impact of power-supply noise on timing in high-frequency microprocessors," IEEE Trans. on Advanced Packaging, vol. 27, no. 1, pp. 135-144, Feb. 2004.
    • (2004) IEEE Trans. on Advanced Packaging , vol.27 , Issue.1 , pp. 135-144
    • Saint-Laurent, M.1    waminathan, M.S.2
  • 3
    • 33847114467 scopus 로고    scopus 로고
    • An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs
    • Sep
    • K. Shimazaki et al., "An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs," in IEEE Custom Integrated Circuits Conference, Sep. 2005, pp. 31-34.
    • (2005) IEEE Custom Integrated Circuits Conference , pp. 31-34
    • Shimazaki, K.1
  • 4
    • 0036685474 scopus 로고    scopus 로고
    • Noise margin and leakage in ultra-low leakage SRAM cell design
    • Aug
    • M. Breitwisch et al., "Noise margin and leakage in ultra-low leakage SRAM cell design," IEEE Trans, on Electron Device, vol. 49, no. 8, pp. 1499-1501, Aug. 2002.
    • (2002) IEEE Trans, on Electron Device , vol.49 , Issue.8 , pp. 1499-1501
    • Breitwisch, M.1
  • 5
    • 0027624892 scopus 로고
    • Circuit design guidelines for N-channel MOSFET hot carrier robustness
    • Jul
    • K. Mistry et al., "Circuit design guidelines for N-channel MOSFET hot carrier robustness," IEEE Trans. on Electron Devices, vol. 40, no. 7, pp. 1284-1295, Jul. 1993.
    • (1993) IEEE Trans. on Electron Devices , vol.40 , Issue.7 , pp. 1284-1295
    • Mistry, K.1
  • 6
    • 0036474952 scopus 로고    scopus 로고
    • A study of soft and hard breakdown (part II): Principles of area, thickness, and voltage scaling
    • M. A. Alam, B. E. Weir, and P. J. Silverman., "A study of soft and hard breakdown (part II): Principles of area, thickness, and voltage scaling," IEEE Trans. on Electron Devices, vol. 49, no. 2, pp. 239-246, 2002.
    • (2002) IEEE Trans. on Electron Devices , vol.49 , Issue.2 , pp. 239-246
    • Alam, M.A.1    Weir, B.E.2    Silverman, P.J.3
  • 7
    • 0036857246 scopus 로고    scopus 로고
    • Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with, synchronous digital circuits
    • Nov
    • M. Badaroglu et al., "Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with, synchronous digital circuits," IEEE J. Solid-State Circuits, vol. 37, pp. 1383-1395, Nov. 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , pp. 1383-1395
    • Badaroglu, M.1
  • 11
    • 0141527465 scopus 로고    scopus 로고
    • Gate leakage reduction for scaled devices using transistor stacking
    • Aug
    • S. Mukhopadhyay et al., "Gate leakage reduction for scaled devices using transistor stacking," IEEE Trans, on Very Large Scale Integration (VLSI) Systems, vol. 11, no. 4, pp. 716-730, Aug. 2003.
    • (2003) IEEE Trans, on Very Large Scale Integration (VLSI) Systems , vol.11 , Issue.4 , pp. 716-730
    • Mukhopadhyay, S.1
  • 12
    • 28444483066 scopus 로고    scopus 로고
    • Is CMOS more reliable with scaling?
    • Stanford
    • T. M. Mak, "Is CMOS more reliable with scaling?," in CRC-IEEE BAST workshop, Stanford, 2003.
    • (2003) CRC-IEEE BAST workshop
    • Mak, T.M.1
  • 13
    • 0034428197 scopus 로고    scopus 로고
    • An on-chip voltage regulator using switched decoupling capacitors
    • Feb
    • M. Ang, R. Salem, and A. Taylor, "An on-chip voltage regulator using switched decoupling capacitors," in ISSCC Dig. Tech. Papers, Feb. 2000, pp. 438-439.
    • (2000) ISSCC Dig. Tech. Papers , pp. 438-439
    • Ang, M.1    Salem, R.2    Taylor, A.3
  • 14
    • 11944270983 scopus 로고    scopus 로고
    • An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs
    • Apr
    • T. Tsukada et al., "An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs," IEEE J. of Solid-State Circuits, vol. 40, no. 1, pp. 67-79, Apr. 2005.
    • (2005) IEEE J. of Solid-State Circuits , vol.40 , Issue.1 , pp. 67-79
    • Tsukada, T.1
  • 16
    • 11944262768 scopus 로고    scopus 로고
    • On-die droop detector for analog sensing of power supply noise
    • Apr
    • A. Muhtaroglu, G. Taylor, and T. Rahal-Arabi, "On-die droop detector for analog sensing of power supply noise," IEEE J. of Solid-State Circuits, vol. 39, no. 4, pp. 651-660, Apr. 2004.
    • (2004) IEEE J. of Solid-State Circuits , vol.39 , Issue.4 , pp. 651-660
    • Muhtaroglu, A.1    Taylor, G.2    Rahal-Arabi, T.3
  • 17
    • 34548824625 scopus 로고    scopus 로고
    • A circuit for reducing large transient current effects on processor power grids
    • Feb
    • E. Hailu et al., "A circuit for reducing large transient current effects on processor power grids," in ISSCC Dig. Tech. Papers, Feb. 2006, pp. 2238-2245.
    • (2006) ISSCC Dig. Tech. Papers , pp. 2238-2245
    • Hailu, E.1
  • 18
    • 34548850860 scopus 로고    scopus 로고
    • On-Die supply-resonance suppression using band-limited active damping
    • Feb
    • J. Xu et al., "On-Die supply-resonance suppression using band-limited active damping," in ISSCC Dig. Tech. Papers, Feb. 2007, pp. 2238-2245.
    • (2007) ISSCC Dig. Tech. Papers , pp. 2238-2245
    • Xu, J.1
  • 19
    • 18744366707 scopus 로고    scopus 로고
    • A built-in technique for probing power-supply noise distribution within large-scale digital integrated circuits
    • Apr
    • T. Okumoto, M. Nagata, and K. Taki, "A built-in technique for probing power-supply noise distribution within large-scale digital integrated circuits," IEEE J. of Solid-State Circuits, vol. 40, no. 4, pp. 813-819, Apr. 2005.
    • (2005) IEEE J. of Solid-State Circuits , vol.40 , Issue.4 , pp. 813-819
    • Okumoto, T.1    Nagata, M.2    Taki, K.3
  • 20
    • 4544377993 scopus 로고    scopus 로고
    • Dynamic power-supply and well noise measurement and analysis for high frequency body-biased circuits
    • Jun
    • K. Shimazaki et al., "Dynamic power-supply and well noise measurement and analysis for high frequency body-biased circuits," in Symp. On VLSI Circuits Dig. Tech. Papers, Jun. 2004, pp. 94-97.
    • (2004) Symp. On VLSI Circuits Dig. Tech. Papers , pp. 94-97
    • Shimazaki, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.