메뉴 건너뛰기




Volumn 55, Issue 11, 2008, Pages 3480-3487

A comparative study on excess-loop-delay compensation techniques for continuous-time sigma-delta modulators

Author keywords

Analog digital (A D) conversion; Cascaded; Continuous time (CT); Excess loop delay (ELD); Multi stage nose shaping (MASH); Sigma delta ( )

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CONTINUOUS TIME SYSTEMS; DELTA MODULATION; DELTA SIGMA MODULATION; OPERATIONAL AMPLIFIERS; RADIO RECEIVERS;

EID: 58049211394     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.925362     Document Type: Article
Times cited : (105)

References (20)
  • 1
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit ΔΣ A/D and D/A converters using data weighted averaging
    • Dec
    • R. T. Baird and T. S. Fiez, "Linearity enhancement of multibit ΔΣ A/D and D/A converters using data weighted averaging," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp. 753-762, Dec. 1995.
    • (1995) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process , vol.42 , Issue.12 , pp. 753-762
    • Baird, R.T.1    Fiez, T.S.2
  • 2
    • 0025595997 scopus 로고
    • Design of a 20 bit sigma-delta A/D-converter for audio applications
    • U. Horbach, "Design of a 20 bit sigma-delta A/D-converter for audio applications," in Proc. IEEE Int. Symp. Circuits Syst., 1990, vol. 4, pp. 2789-2792.
    • (1990) Proc. IEEE Int. Symp. Circuits Syst , vol.4 , pp. 2789-2792
    • Horbach, U.1
  • 3
    • 0004075671 scopus 로고    scopus 로고
    • Continuous-time delta-sigma A/D converters for high speed applications,
    • Ph.D. dissertation, Carleton Univ, Ottawa, ON, Canada
    • O. Shoaei, "Continuous-time delta-sigma A/D converters for high speed applications," Ph.D. dissertation, Carleton Univ., Ottawa, ON, Canada, 1996.
    • (1996)
    • Shoaei, O.1
  • 4
    • 0030703483 scopus 로고    scopus 로고
    • Excess loop delay effects in continuous-time delta-sigma modulators and the compensation solution
    • W. Gao, O. Shoaei, and W. M. Snelgrove, "Excess loop delay effects in continuous-time delta-sigma modulators and the compensation solution," in Proc. IEEE Int. Symp. Circuits Syst., 1997, vol. 1, pp. 65-68.
    • (1997) Proc. IEEE Int. Symp. Circuits Syst , vol.1 , pp. 65-68
    • Gao, W.1    Shoaei, O.2    Snelgrove, W.M.3
  • 5
    • 0030685638 scopus 로고    scopus 로고
    • A methodology for designing continuous-time sigma-delta modulators
    • B. Benabes, M. Keramat, and R. Kielbasa, "A methodology for designing continuous-time sigma-delta modulators," in Proc. Eur. Des. Test Conf., 1997, vol. 1, pp. 46-50.
    • (1997) Proc. Eur. Des. Test Conf , vol.1 , pp. 46-50
    • Benabes, B.1    Keramat, M.2    Kielbasa, R.3
  • 7
    • 0037631120 scopus 로고    scopus 로고
    • A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth
    • S. Yan and E. Sanchez-Sinencio, "A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth," in Proc. Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf., 2003, vol. 1, pp. 62-63, 471-478.
    • (2003) Proc. Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf , vol.1
    • Yan, S.1    Sanchez-Sinencio, E.2
  • 9
    • 34548841783 scopus 로고    scopus 로고
    • A 14 b 20 mW 640 MHz CMOS CT ΔΣ ADC with 20 MHz signal bandwidth and 12 b ENOB
    • G. Mitteregger et al., "A 14 b 20 mW 640 MHz CMOS CT ΔΣ ADC with 20 MHz signal bandwidth and 12 b ENOB," in Proc. Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf., 2006, pp. 131-140.
    • (2006) Proc. Dig. Tech. Papers IEEE Int. Solid-State Circuits Conf , pp. 131-140
    • Mitteregger, G.1
  • 12
    • 33645835379 scopus 로고    scopus 로고
    • On the design of high-performance wideband continuous-time sigma-delta converters using numerical optimization
    • Apr
    • S. Loeda, H. M. Reekie, and B. Mulgrew, "On the design of high-performance wideband continuous-time sigma-delta converters using numerical optimization," IEEE Trans. Circuits Syst. I, Reg. Papers vol. 53, no. 4, pp. 802-810, Apr. 2006.
    • (2006) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.53 , Issue.4 , pp. 802-810
    • Loeda, S.1    Reekie, H.M.2    Mulgrew, B.3
  • 13
    • 0001699151 scopus 로고    scopus 로고
    • A 1.8-mW CMOS ΔΣ modulator with integrated mixer for A/D conversion of IF signals
    • Apr
    • L. J. Breems, E. J. van der Zwan, and J. H. Huijsing, "A 1.8-mW CMOS ΔΣ modulator with integrated mixer for A/D conversion of IF signals," IEEE J. Solid-State Circuits, vol. 35, no. 4, pp. 468-475, Apr. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.4 , pp. 468-475
    • Breems, L.J.1    van der Zwan, E.J.2    Huijsing, J.H.3
  • 14
    • 84865412751 scopus 로고    scopus 로고
    • A 0.6 V 70 dB SNR 0.3 MHz BW multibit switched-opamp ΔΣ modulator
    • J. Sauerbrey and R. Thewes, "A 0.6 V 70 dB SNR 0.3 MHz BW multibit switched-opamp ΔΣ modulator," in Proc. 32nd Eur. Solid-State Circuits Conf., 2006, pp. 492-495.
    • (2006) Proc. 32nd Eur. Solid-State Circuits Conf , pp. 492-495
    • Sauerbrey, J.1    Thewes, R.2
  • 15
    • 3042595686 scopus 로고    scopus 로고
    • Compensation of fimte gain-bandwidth induced errors in continuous-time sigma-delta modulators
    • Jun
    • M. Ortmanns, F. Gerfers, and Y. Manoli, "Compensation of fimte gain-bandwidth induced errors in continuous-time sigma-delta modulators," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 6, pp. 1088-1099, Jun. 2004.
    • (2004) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.51 , Issue.6 , pp. 1088-1099
    • Ortmanns, M.1    Gerfers, F.2    Manoli, Y.3
  • 17
    • 51749108858 scopus 로고    scopus 로고
    • On the implicit anti-aliasing feature of continuous-time cascaded Sigma-Delta modulators
    • Dec
    • M. Keller, A. Buhmann, M. Ortmanns, and Y. Manoli, "On the implicit anti-aliasing feature of continuous-time cascaded Sigma-Delta modulators," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 12, pp. 2639-2645, Dec. 2007.
    • (2007) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.54 , Issue.12 , pp. 2639-2645
    • Keller, M.1    Buhmann, A.2    Ortmanns, M.3    Manoli, Y.4
  • 19
    • 26444452066 scopus 로고    scopus 로고
    • A case study on a 2-1-1 cascaded continuous-time sigma-delta modulator
    • Aug
    • M. Ortmanns, F. Gerfers, and Y. Manoli, "A case study on a 2-1-1 cascaded continuous-time sigma-delta modulator," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 8, pp. 1515-1525, Aug. 2005.
    • (2005) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.52 , Issue.8 , pp. 1515-1525
    • Ortmanns, M.1    Gerfers, F.2    Manoli, Y.3
  • 20
    • 51949086959 scopus 로고    scopus 로고
    • A 2.1 mW/3.2 MW delay-compensated GSM/WCDMA sigma-delta analog-digital converter
    • M. Vadipour et al., "A 2.1 mW/3.2 MW delay-compensated GSM/WCDMA sigma-delta analog-digital converter," in Proc. IEEE Symp. VLSI Circuits, 2008, pp. 180-181.
    • (2008) Proc. IEEE Symp. VLSI Circuits , pp. 180-181
    • Vadipour, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.