A 14b 20mW 640MHz CMOS CT ΔΣ ADC with 20MHz signal bandwidth and 12b ENOB

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Mitteregger, G ^a   Ebner, C ^a   Mechnig, S ^a   Blon, T ^a   Holuigue, C ^a   Romani, E ^a   Melodia, A ^a   Melini, V ^a  

^a Xignal Technologies AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CMOS INTEGRATED CIRCUITS; ENERGY DISSIPATION; MODULATORS; SIGNAL TO NOISE RATIO;

INTERNAL QUANTIZER; LOOP DELAY; QUANTIZER FEEDBACK;

COMPUTERIZED TOMOGRAPHY;

EID: 34548841783     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. J. A. Cherry, W. M. Snelgrove, "Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion," Kluwer, 2000.
2. F. Munoz et al., "A 4.7mW 89.5dB DR CT Complex AIADC with Builtin LPF," ISSCC Dig. Tech. Papers, pp. 500-501, Feb., 2005.
3. S. R. Norsworthy, R. Schreier, and G. C. Temes, "Delta-Sigma Data Converters: Theory, Design, and Simulation," IEEE Press, 1996.
4. m-C Compensation," IEEE J. Solid-State Circuits, vol. 32, no.12, pp. 2000-2011, Dec, 1997.