A 90/μW 15-bit ΔΣ ADC for digital audio

ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 198-201

  Pavan, Shanthi ^a   Krishnapura, Nagendra ^a   Pandarinathan, Ramalingam ^a   Sankar, Prabu ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGNS; CMOS TECHNOLOGIES; CONTINUOUS-TIME (CT); DELAY-COMPENSATION; DIGITAL AUDIO; DYNAMIC RANGE (DR); EUROPEAN; LOOP FILTERING; LOW POWERS; MEASUREMENT RESULTS; POWER DISSIPATIONS; QUANTIZER; SOLID-STATE CIRCUITS CONFERENCE; THIRD-ORDER;

ANALOG TO DIGITAL CONVERSION; ARCHITECTURAL DESIGN; CMOS INTEGRATED CIRCUITS; COMPUTER NETWORKS; ELECTRIC CURRENTS; NETWORKS (CIRCUITS); TECHNOLOGY;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 38849126082     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430279     Document Type: Conference Paper

References (7)

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